Lead Chip Security Architect for AI Accelerators

Qualcomm; San Diego (CA); On-site; USD 135,000 - 202,000; Full time

Job summary

Qualcomm Technologies, Inc. seeks a talented security architect to design and implement the security architecture for the next generation of AI accelerator chips for datacenter use.

You will define baseline and confidential compute security requirements, enable secure communication between processors, and protect devices via out-of-band management and BMC controls. You will work with architects and developers to prototype, implement, and test security-critical components, combining architecture

Qualifications

• Bachelor’s degree with 4+ years software engineering experience.
• Master’s degree with 3+ years software engineering experience.
• PhD with 2+ years software engineering experience.
• 2+ years of experience with programming languages such as C, C++, Java, Python.

Responsibilities

• Define and document the baseline security requirements for an AI accelerator chip.
• Define and document the security requirements for confidential compute including attestation and workload isolation.
• Define and document security for scale-up/scale-out networks between processors.
• Define security for an AI accelerator chip under out-of-band management via a BMC.
• Define and document an architecture that meets security requirements.
• Prototype, implement, and test security-critical parts of the chip architecture.
• The role combines security architecture work with hands-on prototyping and implementation.

Skills

C/C++

Python

Java

Embedded security

Device attestation

Cryptography

Security architecture

Multitenant / multi-domain security

Education

Bachelor's degree in Engineering, Information Systems, Computer Science, or related field

Master's degree in Engineering, Information Systems, Computer Science, or related field

PhD in Engineering, Information Systems, Computer Science, or related field

Tools

Caliptra

TDISP / IDE

Job description

Qualcomm Technologies, Inc. seeks a talented security architect to design and implement the security architecture for the next generation of AI accelerator chips for datacenter use.

You will define baseline and confidential compute security requirements, enable secure communication between processors, and protect devices via out-of-band management and BMC controls. You will work with architects and developers to prototype, implement, and test security-critical components, combining architecture