Lead 3DIC AMS Design Flows for IVR Power

TSMC - Taiwan Semiconductor Manufacturing Company Limited; San Jose (CA); On-site; USD 153,000 - 250,000; Full time

Benefits offered by this job

Comprehensive benefits

Extensive development opportunities

Competitive pay and allowances

Job summary

A leading semiconductor manufacturer in San Jose is seeking a highly skilled Analog & Mixed-Signal / 3DIC Design Flow Engineer to lead the development of Integrated Voltage Regulator flows. This role involves deep expertise in 3DIC technologies and collaboration with diverse teams. Candidates should possess a Master's or Ph.D. in Electrical Engineering and extensive experience in analog/mixed-signal design. The company offers competitive compensation ranging from $153,000 to $250,000 annually with remote work flexibility.

Qualifications

• 15+ years of proven experience in analog and mixed-signal design with PMIC/IVR focus.
• Proficiency with Cadence/Synopsys/Ansys and other AMS/3DIC EDA tools.
• Strong analytical and problem-solving skills for design and CAD issues.

Responsibilities

• Develop AMS/3DIC design flows compatible with TSMC PDKs.
• Collaborate with EDA vendors to enable tool features.
• Work with cross-functional teams to define specifications.

Skills

Analog and mixed-signal design

3DIC design integration

Collaboration skills

Problem-solving skills

Education

Master's or Ph.D. in Electrical Engineering

Tools

Cadence

Synopsys

Ansys

Job description

A leading semiconductor manufacturer in San Jose is seeking a highly skilled Analog & Mixed-Signal / 3DIC Design Flow Engineer to lead the development of Integrated Voltage Regulator flows. This role involves deep expertise in 3DIC technologies and collaboration with diverse teams. Candidates should possess a Master's or Ph.D. in Electrical Engineering and extensive experience in analog/mixed-signal design. The company offers competitive compensation ranging from $153,000 to $250,000 annually with remote work flexibility.