Layout Design Intern

118-WW TMG MFG OPS; United States; On-site; USD 28,000 - 41,000; Part time

Job summary

Texas Instruments is seeking a Layout Design Intern to develop multi-dimensional IC layouts from schematics using CAD software. You will floorplan, design, implement and verify analog ICs, supporting design engineers to meet precision, speed, area, and power targets.

You will collaborate with Analog and Digital teams, ensure layouts follow rules, verify DRC/ERC, and assist in design flow automation. This internship emphasizes teamwork and proactive problem-solving.

Qualifications

• Pursuing an Associate or Bachelor degree in Electrical Engineering, Engineering Technology, or related field.
• Minimum 3.0 out of 4.0 GPA.
• Preferred: familiarity with electrical circuits (resistance, capacitance, voltage, current).
• Familiarity with Unix/Linux and mixed-signal EDA tools (Cadence Virtuoso, Assura LVS, DRC, Mentor, Synopsys).
• Basic coding skills in Perl, Python, or C/Cadence SKILL.

Responsibilities

• Collaborate with Analog and Digital layout teams and the global layout community.
• Ensure layout follows manufacturing rules and is area-efficient.
• Write layout specifications, verify dimensions and artwork.
• Verify DRC/ERC compliance and participate in layout reviews.
• Create design flow automation.

Skills

Verbal communication

Written communication

Team collaboration

Analytical skills

Problem-solving

Initiative

Education

Associate/Bachelor degree in Electrical Engineering or related

Tools

Cadence Virtuoso

Assura LVS

DRC

Unix/Linux

Mentor

Synopsys

Cadence SKILL

Perl

Python

C

Job description

Change the world. Love your job.

Texas Instruments is currently seeking a Layout Design Intern to join the team. In this role, you will have the opportunity to work in a team that creates semiconductors that go into exciting and cutting-edge technologies like smart phones, cars, satellites, robotics, and numerous other applications. You will develop and prepare multi-dimensional layouts and detailed drawings of semiconductor devices from schematics and related geometry provided by design engineering.

About the job

This position will require the creation and management of integrated circuit (IC) layouts from start to finish. Using CAD software, you will floorplan, design, implement and verify analog integrated circuits. You will support the design engineers to reach goals in precision, speed, area, reliability, power and ESD requirements. You will also work with PE/Packaging engineers to assure reliable production capability and proper data preparation for fab hand-off, documentation, and archive.

Some of your responsibilities will include, but will not be limited to:

• Collaborating with Analog and Digital design teams and the global layout design community
• Understanding manufacturing rules and implementing layout to be robust and area-efficient
• Writing layout specifications, checking dimensions, and verifying completed art work
• Verifying that the layout is compliant with Design Rule Checks (DRCs) and Electrical Rule Checks (ERCs)
• Participating in layout design reviews
• Creating design flow automation

Texas Instruments will not sponsor job applicants for visas or work authorization for this position.

Minimum requirements

• Currently pursuing an Associates or Bachelors degree in Electrical Engineering, Engineering Technology, or related degree
• Minimum 3.0 out of 4.0 GPA
• Preferred qualifications:
• Working knowledge of electrical circuits such as resistance, capacitance, voltage and current
• Familiarity with Unix/Linux, Cadence Virtuoso, Assura LVS, DRC, or similar mixed signal EDA tools (Mentor, Synopsys)
• Basic proficiency in one or more coding languages such as Perl, Python, C, Cadence SKILL
• Familiarity with semiconductor device physics, analog circuits and their layout sensitivities
• Working knowledge of semiconductor processes and IC production flowincluding BJTs, Diodes, FETs, passive components, packaging and thermal design
• Working knowledge of layout-related matching techniques, on-chip parasitic sources and minimization, routing impedances and electromigration, and crosstalk
• Ability to establish strong relationships with key stakeholders critical to success, both internally and externally
• Strong verbal and written communication skills
• Ability to quickly ramp on new systems and processes
• Demonstrated strong interpersonal, analytical and problem-solving skills
• Ability to work in teams and collaborate effectively with people in different functions
• Ability to take the initiative and drive for results
• Strong time management skills that enable on-time project delivery
• Put your talent to work with us as a Layout Design Intern– change the world, love your job!