Latency-Optimized FPGA Engineer for High-Frequency Trading

Neutral Street; Chicago (IL); On-site; USD 120,000 - 210,000; Full time

Job summary

Neutral Street is seeking an FPGA Engineer to design and deploy RTL solutions for latency-sensitive trading strategies. You will develop FPGA-based modules that process market data feeds with ultra-low latency, and you will verify and optimize their performance in collaboration with software teams.

The role emphasizes HDL proficiency, FPGA toolchain experience, and the ability to evaluate emerging technologies to maintain competitive hardware performance.

Qualifications

• BS/MS in Electrical Engineering or Computer Engineering.
• Experience with SystemVerilog, Verilog, or VHDL.
• Knowledge of network protocols (Ethernet, IP, TCP/UDP) and PCIe.
• Experience with FPGA toolchains such as Altera/Intel or Xilinx.

Responsibilities

• Design, implement, and verify FPGA-based trading algorithms and network stacks.
• Optimize RTL for minimum latency and maximum throughput.
• Collaborate with software engineers to build seamless hardware-software co-designs.
• Evaluate new FPGA technologies and architectures.

Skills

RTL design

Education

BS in Electrical Engineering or Computer Engineering

Tools

SystemVerilog/Verilog/VHDL

Altera/Intel toolchains

Xilinx toolchains

Job description

Neutral Street is seeking an FPGA Engineer to design and deploy RTL solutions for latency-sensitive trading strategies. You will develop FPGA-based modules that process market data feeds with ultra-low latency, and you will verify and optimize their performance in collaboration with software teams.

The role emphasizes HDL proficiency, FPGA toolchain experience, and the ability to evaluate emerging technologies to maintain competitive hardware performance.