Intel Foundry Advanced Device Development Engineering Manager at Intel Santa Clara, CA

Sunseeker Property Service; Santa Clara (CA); Hybrid; USD 225,000 - 318,000; Full time

Job summary

Intel is seeking an Advanced Device Development Engineering Manager to lead a high-performance device engineering team in a cutting-edge semiconductor environment. The role focuses on designing, executing, and analyzing experiments to meet engineering specs for advanced process technologies, with collaboration across LTD and foundry teams.

The position emphasizes leadership, robust test structures, and data-driven decisions, with a hybrid work model and multi-location presence in Hillsboro,

Qualifications

• Experience in advanced node semiconductor industry.
• Knowledge of semiconductor materials, fabrication, and device physics.
• Experience with electrical characterization of semiconductor devices (transistor/diode).
• Strong data analysis and interpretation skills.

Responsibilities

• Lead a team of device engineers to develop high-volume process technology meeting performance, yield, and reliability targets.
• Set priorities and foster an inclusive team environment while developing careers.
• Ensure delivery of high-quality PDk and perform model-hardware correlation.
• Collaborate with foundry and LTD groups to maximize product performance.
• Define robust test structures and run programs to validate design rules.
• Apply statistics, data mining, and analytics to derive development direction.

Skills

Semiconductor materials

Fabrication

Device physics

Electrical characterization

Education

Degree in Electrical Engineering, Physics, or Materials Science

Ph.D. with 10+ years of experience

Masters with 15+ years of experience

Tools

JMP

MATLAB

Octave

Python

SQL

C/C++

JSL/Perl/TCL

Job description

Job Details

Job Description: About the TeamLogic Technology Development (LTD) develops and delivers Intel's leading-edge silicon process technologies for both Intel products and Intel Foundry customers. LTD is responsible for creating process technologies that meet targets for performance, power, area, yield, reliability, cost, and schedule while ensuring they can be successfully transferred into high-volume manufacturing.

About the Role

This position is in the Logic Technology Development (LTD) team working in one of the most advanced semiconductor cleanroom facilities in the world. You will be designing, executing, and analyzing experiments necessary to meet engineering specifications for their process.

The Advanced Device Development Engineering Manager is responsible for leading scientific research device group enabling the manufacture of innovative device architectures

Key Responsibilities

• Lead a team of device engineers to develop a high-volume capable process technology that meets performance, yield, and reliability requirements for both internal and foundry products. This includes both physical and electrical data analysis, as well as extensive interaction with other technology development teams (integration, module, design/modeling and reliability)


• Set priorities of a team embedded in programs targeted for foundry offerings to get results across boundaries, ensure an inclusive work environment, develop employee careers and manage team performance.


• Work closely with LTD core program integration and device organization to ensure the high-quality Process-Design Kit (PDK) is delivered to design enablement team. It includes extensive Silicon-to-Simulation (or model-hardware correlation) analysis/target projection, layout effect validation and electrical monitors to product parametric correlation.


• Collaborate closely with LTD foundry technology engineering group to ensure the customer achieves leadership product performance and derives maximum value from Intel's advanced manufacturing technologies.


• Define robust test structures and test programs to validate advanced design rules and reliably extract key device parameters.


• Use Statistics, Data Mining, and other data analysis techniques to collect, explore, and extract insights from Electrical-test, yield, and fab data to define future development direction.

Required Skills and Experience

• Experience in advanced node semiconductor industry in one or more of the following:


• Semiconductor materials


• Fabrication


• Device physics


• Electrical characterization of Semiconductor Devices (transistor, diode, etc.)

Preferred Skills and Experience

• Advanced Transistor Device Structures and Device Physics.


• Process monitoring Test structures design and layout experience.


• Device and circuit simulation.


• Statistical Process Control (SPC) or Design of Experiments (DOE) principles and engineering analysis tools.


• Expertise in database structures, research methods, machine learning, analytics packages (i.e., JMP, MATLAB, Octave), scripting languages (i.e., JSL, Perl, TCL), or programming languages (i.e., Python, SQL, C/C++)


• Expertise in agentic AI and orchestrated LLM workflows, machine learning, deep learning, Retrieval-Augmented Generation (RAG), knowledge engineering, and dataflow pipeline architectures.

Qualifications

• Degree in Electrical Engineering, Physics, Material Science, or scientific field of study directly related to Semiconductor.


• Ph.D. with 10+ years of experience in advanced node semiconductor industry OR Masters with 15+ of experience.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location

US, Oregon, Hillsboro

Additional Locations

• US, California, Folsom


• US, California, San Diego


• US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $224,970.00-317,600.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*

ADDITIONAL INFORMATION

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Summary

• Location: US, Oregon, Hillsboro; US, California, San Diego; US, California, Folsom; US, California, Santa Clara


• Type: Full time