Integrated Circuit Designer

MIT Lincoln Laboratory

Lexington (MA)

On-site

USD 145,200 - 220,000

Full time

14 days+
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Benefits offered by this job

Comprehensive health, dental, and vision plans
MIT‑funded pension
Matching 401(k)
Paid leave (vacation, sick, parental, military, etc.)
Tuition reimbursement and continuing education programs
Mentorship programs
Work‑life balance options

Job summary

A leading research facility in Massachusetts is seeking an Integrated Circuit Designer to develop next‑generation readout architectures for imaging platforms. The ideal candidate will have a Ph.D. in Electrical or Computer Engineering, or an M.S. with relevant experience. Responsibilities include IC design and collaborating with a team to enhance imaging systems. Salary ranges from $145,200 for recent graduates to $220,000 for experienced candidates, along with robust benefits and a commitment to employee growth.

Qualifications

  • Strong knowledge of integrated design techniques and tools.
  • Ability to develop next‑generation readout integrated circuit architectures.
  • Capability to collaborate within a vertically integrated team.

Responsibilities

  • Develop next‑generation readout integrated circuit architectures.
  • Collaborate with a design team focused on building imaging systems.

Skills

Digital IC design
Industry standard IC design flows (Cadence, Mentor, Synopsys)
HDL programming and simulation
Synthesis and Place and Route
Functional verification
Timing analysis techniques
Scripting (Python, Perl)
FinFET and multi‑gate transistor design techniques
Advanced process design kits for sub‑22 nm nodes
Multi‑patterning and litho‑friendly design practices
Power management and leakage mitigation in advanced nodes
Signal integrity and parasitic extraction for nanoscale designs
Design for manufacturability at advanced technology nodes
Low‑power design techniques (power gating, dynamic voltage/frequency scaling)

Education

Ph.D. in Electrical Engineering, Computer Engineering, or related field
M.S. degree with 5+ years of experience

Job description

Integrated Circuit Designer

Job posted on Apr 17, 2026.

Location: Lexington, MA, US.

The Advanced Imager Technology Group develops imaging platforms that enable impactful national security capabilities and scientific discovery. Research ranges from fundamental device design to camera technology for fielded systems, covering the full technology development spectrum from concept to prototype.

Job Description

The group is seeking a Technical Staff member to develop next‑generation readout integrated circuit architectures as part of the digital imager portfolio. Current research areas include designs in advanced technology nodes (< 32 nm), on‑chip digital processing, and reconfigurable logic. The role requires broad knowledge of integrated design techniques and tools, from concept development and modeling to physical implementation and tape‑out.

The successful applicant will be a member of a design team that collaborates within a vertically integrated team focused on building imaging systems for a variety of applications. A growth mindset and commitment to continuous improvement are essential.

Requirements
  • Digital IC design
  • Industry standard IC design flows (Cadence, Mentor, Synopsys)
  • HDL programming and simulation
  • Synthesis and Place and Route
  • Functional verification
  • Timing analysis techniques
  • Scripting (Python, Perl)
  • FinFET and multi‑gate transistor design techniques
  • Advanced process design kits for sub‑22 nm nodes
  • Multi‑patterning and litho‑friendly design practices
  • Power management and leakage mitigation in advanced nodes
  • Signal integrity and parasitic extraction for nanoscale designs
  • Design for manufacturability at advanced technology nodes
  • Low‑power design techniques (power gating, dynamic voltage/frequency scaling)

Candidates should hold a Ph.D. in Electrical Engineering, Computer Engineering, or a related field. In lieu of a Ph.D., holders of an M.S. degree with 5+ years of experience will be considered.

Preferred Experience
  • Full custom design
  • Physical verification

Familiarity with imaging systems or digital signal processing is desirable.

Salary

Recent Graduate Hiring Range: $145,200 – $170,000.

Experienced Hiring Range: $145,200 – $220,000.

Benefits
  • Comprehensive health, dental, and vision plans
  • MIT‑funded pension
  • Matching 401(k)
  • Paid leave (vacation, sick, parental, military, etc.)
  • Tuition reimbursement and continuing education programs
  • Mentorship programs
  • A range of work‑life balance options
  • ... and much more!
EEO Statement

MIT Lincoln Laboratory is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information; U.S. citizenship is required.

Selected candidates will be subject to a pre‑employment background investigation and must be able to obtain and maintain a Secret level DoD security clearance.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Computer Engineer Development of RF and Digital Systems
Computer Engineer Development of RF and Digital Systems

MIT Lincoln Laboratory • Lexington (MA)

On-site
USD 100,200 - 150,000
Comprehensive health, dental, and vision plans
MIT-funded pension
Matching 401K
+2
Mixed-Signal CMOS Design Engineer
Mixed-Signal CMOS Design Engineer

Teledyne Technologies Incorporated • Camarillo (CA)

On-site
USD 91,000 - 121,000
Competitive Salary & Benefits Package
Excellent Health, Dental, Vision, Life
Paid Vacation and Sick Time
+5
Maritime Electro-Optical / Infrared (EO/IR) Imaging
Maritime Electro-Optical / Infrared (EO/IR) Imaging

MIT Lincoln Laboratory • Lexington (MA)

On-site
USD 145,000 - 220,000
Health, dental, and vision plans
MIT-funded pension
Matching 401K
+2
Readout IC Architect for Imaging Systems
Readout IC Architect for Imaging Systems

MIT Lincoln Laboratory • Lexington (MA)

On-site
USD 145,200 - 220,000
Comprehensive health, dental, and vision plans
MIT‑funded pension
Matching 401(k)
+4
Photonic Integrated Circuit Fabrication
Photonic Integrated Circuit Fabrication

MIT Lincoln Laboratory • Lexington (MA)

On-site
USD 145,000 - 220,000
Health plans
Pension
401K matching
+4
Associate Staff - Embedded Systems Engineer
Associate Staff - Embedded Systems Engineer

MIT Lincoln Laboratory • Lexington (MA)

On-site
USD 116,000 - 182,000
Health plans
MIT-funded pension
401K matching
+2
Senior Hardware Design Engineer
Senior Hardware Design Engineer

Fairchild Imaging, Inc. • San Jose (CA)

On-site
USD 180,000 - 200,000
9/80 Schedule
Medical, Dental and Vision coverage
Health Savings Account
+3
Mixed-Signal IC Design Engineer
Mixed-Signal IC Design Engineer

Senseeker • Santa Barbara (CA)

On-site
USD 95,000 - 120,000
Paid time off
401k with company match
Health/Dental/Vision
+1
Electronics Engineering-Associate Staff
Electronics Engineering-Associate Staff

MIT Lincoln Laboratory • Lexington (MA)

On-site
USD 116,000 - 182,000
Health, dental, and vision plans
MIT-funded pension
401K matching
+4
Senior Photonic-Integrated-Circuit Integration Engineer
Senior Photonic-Integrated-Circuit Integration Engineer

Intel • Santa Clara (CA)

On-site
USD 191,000 - 312,000
Stock bonuses
Health benefits
Retirement plan
+1