IC Layout Design Intern: Build Next-Gen Semiconductors

Texas Instruments Incorporated; Dallas (TX); On-site; USD 32,000 - 48,000; Part time

Job summary

Texas Instruments Incorporated is seeking a Layout Design Intern to join our team in Dallas. You will develop multi-dimensional IC layouts and drawings from schematics, collaborating with Analog and Digital teams and supporting production hand-off.

You will use CAD tools to floorplan, design, verify analog IC layouts, and help ensure precision, speed, and area efficiency while aligning with design and manufacturing requirements.

Qualifications

• Pursuing an Associates or Bachelors in Electrical Engineering or related field.
• Minimum 3.0 GPA (on a 4.0 scale).

Responsibilities

• Collaborating with Analog and Digital design teams and the global layout design community.
• Understanding manufacturing rules and implementing layout to be robust and area-efficient.
• Writing layout specifications, checking dimensions, and verifying completed artwork.
• Verifying that the layout is compliant with Design Rule Checks (DRCs) and Electrical Rule Checks (ERCs).
• Participating in layout design reviews.
• Creating design flow automation.

Skills

Coding languages

Communication skills

Problem-solving

Education

Electrical Engineering degree

GPA 3.0/4.0

Tools

Cadence Virtuoso

Assura LVS

DRC

Unix/Linux

Mentor

Synopsys

Job description

Texas Instruments Incorporated is seeking a Layout Design Intern to join our team in Dallas. You will develop multi-dimensional IC layouts and drawings from schematics, collaborating with Analog and Digital teams and supporting production hand-off.

You will use CAD tools to floorplan, design, verify analog IC layouts, and help ensure precision, speed, and area efficiency while aligning with design and manufacturing requirements.