Hybrid Deep Learning Hardware Engineer for AI Accelerators

Intel Corporation

Santa Clara (CA)

Hybrid

USD 150,000 - 241,000

Full time

7 days ago
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Job summary

Intel is seeking a Deep Learning Hardware Engineer to shape the next generation of NPU architecture for AI PCs, edge AI, and multimodal foundation models. You will work at the intersection of AI, computer architecture, and hardware-software co-design to optimize workloads and drive innovations in AI acceleration.

The role collaborates across architecture, software, compiler, and ML teams to deliver high-performance, power-efficient AI solutions for client platforms, with emphasis on

Qualifications

  • Bachelor's degree with 3+ years of relevant experience or Master's with 2+ years or PhD with 3+ months.
  • Experience with digital logic design and RTL using SystemVerilog or Verilog.
  • Experience with AI model architectures and neural network topologies.

Responsibilities

  • Contribute to the design and optimization of neural compute and AI accelerator architectures.
  • Develop and evaluate RTL implementations of hardware features supporting machine learning workloads.
  • Analyze AI models and workloads to identify performance, power, and efficiency opportunities.
  • Partner with architecture, software, and algorithm teams to define future hardware capabilities.
  • Support hardware-software co-design efforts to optimize AI solutions across the technology stack.
  • Evaluate neural network mapping strategies for accelerated inference execution.
  • Apply optimization techniques such as quantization, pruning, and compression to improve AI efficiency.
  • Utilize computer architecture principles including pipelining, parallelism, memory hierarchy, and data movement optimization.

Skills

SystemVerilog/Verilog
AI model architectures
Git workflows
AI model optimization

Education

Bachelor's degree in CS/EE or STEM field
Master's degree in same fields
PhD in same fields

Job description

Intel is seeking a Deep Learning Hardware Engineer to shape the next generation of NPU architecture for AI PCs, edge AI, and multimodal foundation models. You will work at the intersection of AI, computer architecture, and hardware-software co-design to optimize workloads and drive innovations in AI acceleration.

The role collaborates across architecture, software, compiler, and ML teams to deliver high-performance, power-efficient AI solutions for client platforms, with emphasis on

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