Hybrid CPU Validation Engineer

Intel; Austin (TX); Hybrid; USD 106,000 - 200,000; Full time

Benefits offered by this job

Stock bonuses

Health insurance

Retirement benefits

Vacation

Job summary

Intel in Austin, TX is seeking an experienced CPU validation professional to design and execute validation plans for CPUs across silicon platforms. You will work with architecture, design, verification, and manufacturing teams to improve validation strategies and ensure silicon readiness.

The role requires hands‑on experience with CPU core architecture, RTL/Emulation environments, and scripting in C/C++ or Python. A strong debugging mindset and collaboration skills are essential.

Qualifications

• Bachelor's degree with 2+ years of relevant experience, or Master’s with 1+ year, or PhD with 0 years.
• Knowledge of CPU architecture and related courses in VLSI or digital design.
• Proficiency in C/C++, Python; familiarity with Verilog/SystemVerilog is a plus.

Responsibilities

• Defines, develops, and performs functional validation for CPUs, focusing on validation of internals and integration.
• Develops CPU validation methodologies and test plans; executes plans with cross‑team collaboration.
• Publishes validation reports and liaises with architecture, design, and manufacturing teams.
• Builds validation infrastructure and tools for silicon readiness across environments.
• Engages in product lifecycle activities and debug across simulation, emulation, and FPGA.

Skills

CPU architecture knowledge

C/C++

Python

Verilog/System Verilog

Debugging skills

Education

Bachelor's degree in Electrical/Computer Engineering or CS

Master's degree in Electrical/Computer Engineering or CS

PhD in Electrical/Computer Engineering or CS

Tools

RTL simulation

Emulation environments

Job description

Intel in Austin, TX is seeking an experienced CPU validation professional to design and execute validation plans for CPUs across silicon platforms. You will work with architecture, design, verification, and manufacturing teams to improve validation strategies and ensure silicon readiness.

The role requires hands‑on experience with CPU core architecture, RTL/Emulation environments, and scripting in C/C++ or Python. A strong debugging mindset and collaboration skills are essential.