HWIL FPGA Engineer

Cantos Ventures

Allen (TX)

On-site

USD 130,000 - 190,000

Full time

14 days+

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Benefits offered by this job

Equity for employees
Paid time off
Holidays
Comprehensive health benefits
Parental leave
Fitness stipend
Onsite EV charging
Catered meals

Job summary

Castelion seeks an experienced HWIL FPGA Engineer to lead the FPGA architecture and development for our next-generation Hardware-in-the-Loop test capability. You will be a foundational member of a multidisciplinary team building a real-time test environment that enables rapid validation of hardware and algorithms before flight testing.

You will collaborate across simulation, hardware, electrical, mechanical, software, and guidance engineers to create high-performance FPGA solutions, contribute

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • 5+ years of professional FPGA development experience.
  • Experience developing FPGA solutions using VHDL, Verilog, or SystemVerilog.
  • Experience with Xilinx/AMD FPGA platforms and associated development toolchains.
  • U.S. Citizenship required.

Responsibilities

  • Lead FPGA architecture, development, integration, and verification for Castelion's Hardware-in-the-Loop (HWIL) test system.
  • Develop FPGA solutions supporting real-time evaluation and closed-loop hardware testing.
  • Collaborate with simulation engineers to integrate high-fidelity 6-DOF models into FPGA-based HWIL architectures.
  • Design FPGA interfaces that integrate seamlessly with radar hardware, sensors, and supporting electronics.
  • Develop high-performance FPGA implementations using high-level synthesis tools while optimizing generated RTL where appropriate.
  • Participate in system architecture definition, interface development, and hardware design reviews.
  • Develop FPGA verification strategies including simulation, timing analysis, hardware validation, and laboratory integration.
  • Support bring-up, debugging, and optimization of FPGA hardware in laboratory environments.
  • Partner closely with electrical, mechanical, software, and systems engineers to rapidly iterate HWIL capabilities using a crawl, walk, run development methodology.
  • Contribute to the evolution of the HWIL system from early open-loop demonstrations to fully closed-loop representative mission testing.

Skills

FPGA development
VHDL/Verilog/SystemVerilog
Xilinx/AMD FPGA tools
Team collaboration
Security clearance eligibility

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

Xilinx/AMD toolchains
HDL design tools

Job description

Why Castelion, Why Now

Castelion is moving incredibly fast to develop and deliver advanced defense systems at a time when execution matters more than ever. We believe focus and technical excellence are decisive advantages - and we are building a team that can deliver real capability, not just concepts.

This is a rare opportunity to join at an early stage, where your work will directly shape critical systems, influence major technical decisions, and have immediate, real-world impact.

HWIL FPGA Engineer

As a HWIL FPGA Engineer, you will lead the FPGA architecture and development for Castelion's next-generation Hardware-in-the-Loop (HWIL) test capability. You will be a foundational member of a multidisciplinary team responsible for building a real-time test environment that enables rapid validation of hardware and algorithms before flight testing.

Working alongside simulation, hardware, electrical, mechanical, software, and guidance engineers, you'll develop FPGA-based solutions that bridge high-fidelity 6-DOF simulation with physical hardware, ultimately enabling fully closed-loop testing in representative mission environments.

This role is ideal for engineers who enjoy solving difficult real-time hardware challenges, working across multiple engineering disciplines, and building systems from the ground up.

Responsibilities

  • Lead FPGA architecture, development, integration, and verification for Castelion's Hardware-in-the-Loop (HWIL) test system.
  • Develop FPGA solutions supporting real-time evaluation and closed-loop hardware testing.
  • Collaborate with simulation engineers to integrate high-fidelity 6-DOF models into FPGA-based HWIL architectures.
  • Design FPGA interfaces that integrate seamlessly with radar hardware, sensors, and supporting electronics.
  • Develop high-performance FPGA implementations using high-level synthesis tools while optimizing generated RTL where appropriate.
  • Participate in system architecture definition, interface development, and hardware design reviews.
  • Develop FPGA verification strategies including simulation, timing analysis, hardware validation, and laboratory integration.
  • Support bring-up, debugging, and optimization of FPGA hardware in laboratory environments.
  • Partner closely with electrical, mechanical, software, and systems engineers to rapidly iterate HWIL capabilities using a crawl, walk, run development methodology.
  • Contribute to the evolution of the HWIL system from early open-loop demonstrations to fully closed-loop representative mission testing.

Basic Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • 5+ years of professional FPGA development experience.
  • Experience developing FPGA solutions using VHDL, Verilog, or SystemVerilog.
  • Experience with Xilinx/AMD FPGA platforms and associated development toolchains.
  • U.S. Citizenship required.

Preferred Skills and Experience

  • Ability to generate RTL from HLS workflows while understanding and optimizing the resulting hardware implementation.
  • Strong understanding of FPGA development workflows including simulation, synthesis, implementation, timing closure, and hardware debugging.
  • Experience integrating FPGA designs with complex hardware interfaces and embedded systems.
  • Familiarity with hardware-in-the-loop (HWIL), processor-in-the-loop (PIL), or real-time simulation environments.
  • Experience supporting radar, RF, avionics, guidance, navigation, control, or aerospace systems.
  • Experience working with high-speed interfaces, real-time data processing, and deterministic hardware architectures.
  • Familiarity with laboratory integration, oscilloscopes, logic analyzers, and hardware debugging tools.
  • Ability to collaborate effectively across multidisciplinary engineering teams in a fast-paced development environment.
  • Active U.S. security clearance or the ability to obtain one is highly desired.

Other Duties

Please note this job description is not designed to cover or contain a comprehensive listing of activities, duties or responsibilities that are required of the employee for this job. Duties, responsibilities and activities may change at any time with or without notice.

Benefits And Perks

All full-time employees are granted meaningful long-term equity, sharing in the company's significant growth trajectory. We offer four (4) weeks of paid time off, ten (10) company-paid holidays, and comprehensive health benefits - including 100% employee-covered medical and strong dependent coverage, along with dental and vision plans. We also provide paid parental leave to support growing families, a $100 monthly fitness stipend to promote health and performance, and onsite EV charging for convenience. In addition, employees enjoy perks like catered meals, company-covered food during high-demand periods, and a fully stocked kitchen to stay fueled throughout the day.

While this position does not currently require a U.S government-issued security clearance, it may in the near future. Therefore, the ability to obtain and maintain a U.S. government–issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.

Affirmative Action/EEO Statement

Employment with Castelion is governed on the basis of competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

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