HDL Technical Team Lead

First Rf; Boulder (CO); On-site; USD 150,000 - 250,000; Full time

Benefits offered by this job

PTO 4 weeks

Hybrid work

Tuition reimbursement

401(k) match 6%

Healthcare

Job summary

FIRST RF Corporation in Boulder, CO seeks an HDL Technical Team Lead to guide FPGA/HDL development across multiple RF programs. The role blends hands‑on coding (~50%) with strategic direction, architecture guidance, and cross‑team collaboration to ensure reuse and quality across designs.

The ideal candidate has 3+ years FPGA/HDL experience, strong digital design and timing expertise, and familiarity with RF concepts. U.S. citizenship and an ability to obtain a security clearance are required.

Qualifications

• U.S. Citizenship and ability to obtain a U.S. Security Clearance.
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of FPGA/HDL development experience (Verilog, VHDL, or similar).
• Experience leading or owning technical direction for HDL designs or projects.
• Strong understanding of digital system design, timing constraints and interfaces.
• Experience with high-speed and control interfaces (PCIe, SPI, I2C, AXI, Aurora, JESD, etc.).
• Familiarity with RF system concepts and how digital logic interfaces with analog hardware.
• Ability to think across systems and programs, not just individual blocks.

Responsibilities

• Serve as the technical lead for HDL development across multiple concurrent programs
• Guide system-level HDL architecture and ensure designs align with program requirements and long-term platform strategy
• Identify opportunities to reuse architecture, IP, and tooling across projects to improve efficiency and consistency
• Lead technical planning, design reviews, and cross‑team alignment — ensuring teams move quickly without sacrificing quality
• Spend ~50% of your time on specialty tooling, targeted HDL development, and complex problem‑solving
• Collaborate closely with RF, embedded software, and hardware teams to ensure seamless system integration
• Support and mentor HDL engineers through technical guidance, design feedback, and best‑practice development — without direct people management
• Own and influence design documentation, simulation strategy, verification approach, and integration readiness
• Evaluate architectural trade‑offs, interfaces, and timing constraints across systems and programs
• Support hardware bring‑up and integration efforts in Linux‑based environments

Skills

HDL development

FPGA design

Technical leadership

System architecture

Verilog/VHDL

Cross-team collaboration

RF knowledge

Education

Bachelor's in Electrical/Computer Engineering

Master's degree (preferred)

Tools

Vivado

ModelSim

Spade/Veryl

Scripting/automation tools

Job description

Job DetailsJob Location: FIRST RF Corporation - Boulder, CO 80301Salary Range: $150,000.00 - $250,000.00 SalarySummary

We are looking for an HDL Technical Team Lead to guide and elevate our FPGA/HDL development efforts across multiple advanced RF programs. This role is ideal for a senior HDL engineer who enjoys technical leadership, system-level thinking, and influencing how teams build, without direct people management responsibilities.

You will serve as the technical lead across 3-4 concurrent programs, providing architectural guidance, ensuring consistency and reuse across designs, and helping teams make sound engineering tradeoffs. While approximately 50% of your time will be hands‑on (including specialty tooling and targeted development), most of the role is strategic and coordination‑focused – driving technical direction, alignment, and execution across projects. This is a high‑impact role for someone who enjoys leading through expertise, mentoring by example, and shaping how systems come together on a scale.

Key Responsibilities

• Serve as the technical lead for HDL development across multiple concurrent programs
• Guide system-level HDL architecture and ensure designs align with program requirements and long-term platform strategy
• Identify opportunities to reuse architecture, IP, and tooling across projects to improve efficiency and consistency
• Lead technical planning, design reviews, and cross‑team alignment — ensuring teams move quickly without sacrificing quality
• Spend ~50% of your time on specialty tooling, targeted HDL development, and complex problem‑solving
• Collaborate closely with RF, embedded software, and hardware teams to ensure seamless system integration
• Support and mentor HDL engineers through technical guidance, design feedback, and best‑practice development — without direct people management
• Own and influence design documentation, simulation strategy, verification approach, and integration readiness
• Evaluate architectural trade‑offs, interfaces, and timing constraints across systems and programs
• Support hardware bring‑up and integration efforts in Linux‑based environments
• Evaluate architectural trade‑offs, interfaces, and timing constraints across systems and programs

Other Duties

Please note this job description is not designed to cover or contain a comprehensive listing of activities, duties or responsibilities that are required of the employee for this job. Duties, responsibilities and activities may change at any time with or without notice.

Supervisory Responsibilities

This position has no direct supervisory responsibilities.

Position Type/Expected Hours of Work

This is a full-time position at 40 hours per week. Typical office hours include Monday-Friday, 8:00am-5:00pm, however these hours will vary based on workload and the manager’s discretion. This job may require more than 40 hours of work per week as the need arises.

Travel

About 10% travel is expected for this position.

Physical Demands

While performing the duties of this job, the employee is regularly required to talk or hear. Specific vision abilities required by this job include close vision and ability to adjust focus. This would require the ability to lift files, open filing cabinets, and bend or stand on a stool as necessary. The employee will also regularly be seated at a desk and using a computer. Reasonable accommodation may be made to enable individuals with disabilities to perform the essential functions.

Work Environment

This job operates in a professional office environment. This role routinely uses standard office equipment as well as 3D printers and standard tools (torque wrench, vice, etc…). Employees also have access to the machine shop and may need to solder or use adhesives, paints, or the 3D bath from time to time.

About FIRST RF

FIRST RF is a fast-growing, multi-discipline, privately owned small business focused on engineering and manufacturing of advanced technologies - specifically in antennas and radio frequency (RF) systems. We are an energetic team empowered with world‑class facilities and resources. We promote a culture which prioritizes innovation and responsiveness. By making bold investments in the development of groundbreaking technologies, FIRST RF has fielded award-winning products ranging from revolutionary passive antennas to highly complex, active antenna systems.

Benefits Summary

We offer all employees four weeks of PTO each year, flexible scheduling, hybrid work, tuition reimbursement, up to 6% 401(k) match, and healthcare, dental, and vision plans.

AAP/EEO Statement

We are an Equal Employment Opportunity employer committed to providing equal opportunity in all of our employment practices, including selection, hiring, assignment, re‑assignment, promotion, transfer, compensation, discipline, and termination. The Company prohibits discrimination, harassment, and retaliation in employment based on race; color; religion; genetic information; national origin; sex (including same sex); sexual orientation; gender identity; pregnancy, childbirth, or related medical conditions; age; disability or handicap; citizenship status; service member status; or any other category protected by federal, state, or local law. We support protected veterans and individuals with disabilities through our affirmative action program

QualificationsRequired Education and Experience

• U.S. Citizenship and ability to obtain a U.S. Security Clearance
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field
• 3+ years of FPGA/HDL development experience (Verilog, VHDL, or similar)
• Experience leading or owning technical direction for HDL designs or projects
• Strong understanding of digital system design, timing constraints and interfaces
• Experience with high-speed and control interfaces (PCIe, SPI, I2C, AXI, Aurora, JESD, etc.)
• Familiarity with RF system concepts and how digital logic interfaces with analog hardware
• Ability to think across systems and programs, not just individual blocks

Preferred Experience

• Master’s degree in Electrical Engineering, Computer Engineering, or a related field
• Python, C/C++, or other languages used for tests, tooling, or automation
• Linux development experience (user space, device drivers, Yocto, Petalinux)
• Simulation and verification tools (Vivado, ModelSim, etc.)
• Hardware exposure including board bring‑up, lab debug, or schematic review
• Experience with modeling or HDL generation tools (e,g., Spade, Veryl)
• Prior experience supporting multiple programs or product lines simultaneously