HBM Emulation Architect: SoC Debug & AI-Driven Flows

Micron Technology, Inc; Richardson (TX); On-site; USD 177,000 - 334,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision benefits

Paid time off

Paid holidays

Retirement plan

Job summary

Micron Technology, Inc. is seeking an Hardware Emulation Architect to lead emulation enablement for next‑gen HBM products.

You will architect and deploy hardware emulation ecosystems, including testbenches, transactors, and AI‑driven workflows, collaborating with design, verification, firmware, and architecture teams. The role emphasizes strong RTL/debug skills, memory subsystem emulation, and SoC integration.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 15+ years of relevant Engineering or Design Engineering experience.
• Strong experience with RTL design and debug.
• Hands-on experience developing emulation platforms for complex GPU/CPU and memory systems.
• Solid understanding of SoC architecture, interconnects, and IP integration.

Responsibilities

• Develop and maintain hardware emulation environments for complex SoCs and subsystems.
• Compile, configure, and debug large-scale RTL designs on emulation platforms (e.g., Palladium, Veloce, Zebu).
• Support pre-silicon validation, firmware bring-up, and early software development using emulation.
• Debug functional, performance, and connectivity issues across RTL, firmware, and system layers.
• Create emulation testbenches, transactors, and models for system-level use cases.
• Enable hybrid validation flows (simulation + emulation + FPGA prototyping as needed).
• Provide hands-on support during key project achievements (tapeout, bring-up, customer enablement).

Skills

RTL design & debug

Emulation platforms

Memory subsystems

SoC architecture

Debugging complex designs

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering

Tools

Palladium

Veloce

Zebu

Job description

Micron Technology, Inc. is seeking an Hardware Emulation Architect to lead emulation enablement for next‑gen HBM products.

You will architect and deploy hardware emulation ecosystems, including testbenches, transactors, and AI‑driven workflows, collaborating with design, verification, firmware, and architecture teams. The role emphasizes strong RTL/debug skills, memory subsystem emulation, and SoC integration.