Hardware Engineer IV

Spectraforce Technologies; Sunnyvale (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Spectraforce Technologies in Sunnyvale, CA is seeking a Hardware Engineer IV to oversee hardware validation for next‑generation devices. You will monitor validation progress, review CM reports, analyze failures, and guide engineers on measurement methods while flagging risks under the Validation Lead.

The role emphasizes hands‑on PI/SI measurement, data interpretation, and cross‑functional collaboration with EE, firmware, and CM teams. Strong debugging skills are essential.

Qualifications

• 4+ years of EE hardware validation with PI/SI.
• Strong schematic reading and data interpretation.
• Experience reviewing PCB layouts and lab equipment usage.
• Experience developing test procedures and SOPs.

Responsibilities

• Review CM validation reports and verify data quality.
• Identify anomalies and investigate failures.
• Coordinate with EE design teams for root-cause analysis.
• Maintain issue trackers and provide regular status updates.

Skills

PI & SI expertise

Schematic reading

Data interpretation

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

Oscilloscopes

Power rail probes

Active/differential probes

Current probes

Spectrum analyzers

JIRA

Job description

Hardware Engineer IV

Sunnyvale, CA

12 months

Summary

We are seeking an experienced EE Validation Engineer to support hardware validation of next-generation smart glasses, working closely with the validation lead. In this role, your primary focus will be monitoring validation progress, reviewing CM test reports, analyzing failures, and coordinating with EE design partners to drive issues to closure. You will also guide CM engineers on measurement procedures and perform hands‑on PI/SI debug when needed. While you must possess strong hands‑on measurement skills, the majority of your time will be spent interpreting data, tracking issues, and ensuring problems are resolved efficiently. You will not own final validation decisions, but you are expected to be technically strong enough to flag risks, recommend actions, and keep execution on track under the lead's direction.

Must‑Have Skills

1. 4+ years of EE hardware validation experience with strong expertise in Power Integrity (PI) and Signal Integrity (SI).
2. Experience developing test procedures, SOPs, and technical documentation, with strong schematic reading skills to trace signal paths, analyze power distribution, and interpret schematics and datasheets.
3. Experience reviewing PCB layouts to evaluate probe access, SI/PI risks, and debug strategies, along with expert hands‑on use of lab equipment such as high‑bandwidth oscilloscopes, power rail probes, active/differential probes, current probes, and spectrum analyzers.

Nice‑to‑Have Skills

1. Experience validating wearable, mobile, or IoT hardware, especially space‑constrained, low‑power devices.
2. Familiarity with prototype development cycles (EVT, DVT, PVT) and New Product Introduction (NPI) processes.
3. Experience using issue tracking systems (e.g., JIRA) and coordinating with cross‑functional hardware teams, including EE, firmware, and contract manufacturers (CMs).

Key Responsibilities

Issue Tracking & Closure (Approx. 60%)

• Review CM‑generated validation reports and verify data quality.
• Ensure pass/fail criteria are applied correctly.
• Identify anomalies and investigate validation failures.
• Determine whether issues are caused by measurement errors, design defects, or manufacturing quality.
• Collaborate with EE design teams to present findings and support root‑cause analysis.
• Track issues through resolution and confirm fixes are validated.
• Coordinate across EE, layout, firmware, and CM teams to keep issues moving.
• Maintain issue trackers and provide regular status updates to the Validation Lead.
• Monitor validation progress against project milestones.
• Escalate risks, blockers, and schedule concerns proactively.

CM Guidance (Approx. 20%)

• Develop clear Standard Operating Procedures (SOPs) for validation testing.
• Train CM engineers and technicians on proper measurement techniques.
• Guide probe placement, fixture usage, and data collection methods.
• Define probe points and create annotated layout markups for testing.
• Provide technical support when unexpected measurement results occur.
• Establish acceptance criteria and escalation processes aligned with validation requirements.

Hands‑On Measurement & Debug (Approx. 20%)

• Perform advanced PI/SI measurements during prototype bring‑up and validation.
• Validate CM measurement setups through correlation testing.
• Debug complex or intermittent hardware issues that require senior engineering expertise.
• Develop new measurement methods and fixtures for challenging validation scenarios.
• Support prototype characterization and hardware bring‑up during build phases.

Technical Knowledge Required

Power Integrity (PI)

• Characterize DC‑DC converters (line/load regulation, efficiency, transient response, output ripple/noise).
• Validate power sequencing and timing against IC specifications.
• Evaluate power rail stability under varying load conditions and perform current profiling.
• Validate battery charging circuits, including charge profiles, protection features, and thermal limits.
• Understand Power Distribution Network (PDN) concepts such as ground bounce, decoupling, and voltage droop.

Signal Integrity (SI)

• Perform measurements on high‑speed interfaces (MIPI CSI, SPI, I2C, I2S/PDM, USB, UART).
• Analyze signal quality, including rise/fall times, overshoot, undershoot, ringing, and eye diagrams.
• Investigate crosstalk, reflections, and impedance discontinuities on rigid‑flex and flex PCBs.
• Characterize clock quality and jitter.
• Correlate protocol‑level issues with physical‑layer signal problems.

Schematic & PCB Layout

• Read and interpret complex, multi‑page electrical schematics.
• Understand power trees, circuit topology, and signal routing.
• Review rigid and flex PCB layouts to identify probe points and debug access.
• Evaluate layouts for SI/PI risks, including trace routing, return paths, impedance control, and via transitions.
• Provide layout feedback to improve design testability.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering.
• 4+ years of EE hardware validation experience with strong Power Integrity (PI) and Signal Integrity (SI) expertise.
• Experience analyzing test results, identifying root causes, and driving issue resolution.
• Ability to review validation reports, identify gaps, and recommend follow‑up actions.
• Experience developing clear test procedures, SOPs, and technical documentation.
• Strong schematic reading and circuit analysis skills.
• Experience reviewing PCB layouts and defining debug strategies.
• Expert knowledge of lab equipment, including:
  • High‑bandwidth oscilloscopes (1 GHz+)
  • Power rail probes
  • Active and differential probes
  • Current probesSpectrum analyzers
• Experience with DC‑DC converter characterization.
• Experience performing high‑speed digital signal measurements.
• Strong understanding of transmission line theory, impedance matching, and flex PCB signal integrity.
• Excellent communication skills with experience collaborating across CM, EE, and cross‑functional teams.

Preferred Qualifications

• Experience working with Contract Manufacturers (CMs) or ODMs during hardware validation.
• Experience with wearable, mobile, or IoT devices.
• Familiarity with RF measurements (BLE/Wi‑Fi transmit power, sensitivity, antenna return loss).
• Experience supporting hardware development phases (Prototype, EVT, DVT, PVT, NPI).
• Experience using issue tracking systems and coordinating cross‑functional hardware programs.

Tools & Environment

• Lab Equipment: Keysight/Tektronix oscilloscopes (1 GHz), power rail probes, active probes, Source Measure Units (SMUs), Vector Network Analyzers (VNAs), protocol analyzers.
• Software: Scripting tools, schematic/layout viewers (Allegro, Altium, or equivalent), data analysis tools.
• Documentation: Google Workspace, JIRA/Tasks for issue tracking.
• Collaboration: Daily interaction with the Validation Lead, CM engineers (remote and onsite), EE design teams, and Firmware teams.