Hardware Engineer, High-Speed Optical Transceivers (Hybrid)

Intel Corporation; Santa Clara (CA); Hybrid; USD 122,000 - 232,000; Full time

Benefits offered by this job

Stock bonuses

Health insurance

Retirement plan

Job summary

Intel in Santa Clara is seeking a hardware design engineer to develop and validate 100G/200G transceiver PCBA, driving schematic, layout, and PI/SI optimization. You will collaborate with mechanical, optical, firmware, and process teams to ensure robust performance and manufacturability.

The role emphasizes high-speed signaling, LD designs, and rigorous verification, with access to hybrid work options and a comprehensive benefits package.

Qualifications

• Bachelor's degree with 4+ years experience or higher degrees in Electrical Engineering or related STEM field.
• 3+ years of experience in HW/circuit design, schematic design and layout floor planning.
• Experienced in Cadence tools for schematic and layout.
• High-density and high-speed multi-layer board design.
• Voltage regulator, microcontroller, DAC/ADC selection and layout optimization.
• PCB bring-up and laboratory optical/electrical measurement skills.
• High-speed trace and signaling guidelines (25-50G NRZ, 100Gbps PAM4).

Responsibilities

• Support hardware design of an optical transceiver and evaluation boards.
• Own schematic and layout execution for 100G/200G module PCBA with PI/SI considerations.
• Design PDN for high-speed DSP, RFICs and manage PI and SI requirements.
• Work with mechanical, optical, firmware and process engineers to meet specs.
• Lead design reviews and present design summaries to management with risk mitigation.
• Troubleshoot and optimize performance of sub-system/transceiver module board.

Skills

HW/circuit design

Schematic design

Layout floor planning

Cadence tools

High-density board design

Voltage regulator

microcontroller

DAC/ADC selection

PCB bring-up

optical/electrical measurements

High-speed signaling (25-50G, PAM4)

Education

Bachelor's degree

Master's degree

PhD

Tools

Cadence

Job description

Intel in Santa Clara is seeking a hardware design engineer to develop and validate 100G/200G transceiver PCBA, driving schematic, layout, and PI/SI optimization. You will collaborate with mechanical, optical, firmware, and process teams to ensure robust performance and manufacturability.

The role emphasizes high-speed signaling, LD designs, and rigorous verification, with access to hybrid work options and a comprehensive benefits package.