Hardware Engineer, Design Verification

Normal Computing Corp.

Mountain View (CA)

Presencial

USD 180.000 - 240.000

Jornada completa

14 días+

Consigue una respuesta de este empleador

Tu currículum y tu carta de presentación, adaptados exactamente a lo que buscan contratar.

Supera los filtros ATS

Descripción de la vacante

Normal Computing, based in Mountain View, is seeking a Design Verification Engineer to verify AI-enabled ASICs and raise the bar for verification flows. You will work on thermodynamic ASIC verification, testbench environments, and coverage to tapeout, applying advanced DV techniques.

The ideal candidate has 5+ years in digital verification at a semiconductor or EDA company, deep SystemVerilog/UVM expertise, and hands-on experience with vManager, Xcelium, and Jasper, plus Python or Perl

Formación

  • 5+ years of experience in digital verification in semiconductors or EDA.
  • Proficient with SystemVerilog and UVM methodology.
  • Experience with EDA tools such as vManager, Xcelium, Jasper.
  • Strong Python or Perl scripting skills.
  • End-to-end design verification experience including test plans and stimulus generation.
  • Excellent verbal and written communication for design reviews and debugging.

Responsabilidades

  • Verify internal silicon testbenches, assertions, and coverage from design documents through tapeout.
  • Review AI-generated verification collateral and help define quality metrics.
  • Set up and evaluate EDA tools, ensuring usability on shared computing resources internally.

Conocimientos

Digital verification
SystemVerilog
UVM
Python scripting
Perl scripting
Excellent communication

Herramientas

vManager
Xcelium
Jasper
EDA verification tools

Descripción del empleo

Normal Computing | Build with Us

Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.

The Role

As a Design Verification Engineer at Normal, you will verify our own physics-inspired ASICs on the road to tapeout, and help set the bar for the AI-assisted verification flows we are building for ourselves. The through-line is your DV expertise, applied to silicon that computes differently than anything you've verified before, and to the AI that is changing how verification gets done. This is a seat for a verification engineer who wants their craft to compound rather than repeat.

What You Will Own
  • Thermodynamic ASIC Verification: Own design verification for Normal's internal silicon: testbench environments, assertions, and coverage from design documents through functional coverage and closure, supporting the program to tapeout.

  • AI-Assisted Verification: Review AI-generated verification collateral and help define what good looks like, so the tools the team builds raise the bar rather than lower it.

  • Tooling: Set up and evaluate EDA tools, ensuring usability and effective deployment on shared computing resources internally.

What Makes You a Great Fit
  • 5+ years of experience in digital verification at a major semiconductor or EDA tool company

  • Advanced proficiency in SystemVerilog, UVM methodology, and EDA verification tools (vManager, Xcelium, Jasper), with strong Python or Perl scripting

  • Proven expertise in end-to-end design verification, including test plan creation, stimulus generation, and feature extraction

  • Excellent written and spoken communication skills: you can hold the room in a design review as credibly as you hold a debug session

Bonus Points
  • Hands-on use of LLMs or agentic tools in verification workflows

  • Exposure to analog, mixed-signal, or unconventional compute verification

Equal Employment Opportunity Statement

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.

Accessibility Accommodations

Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.

Privacy Notice

By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.

Consigue la evaluación confidencial y gratuita de tu currículum.

o arrastra y suelta tu archivo aquí

Similar jobs

Puestos de trabajo similares que vale la pena comparar

Hardware Engineer, RTL
Hardware Engineer, RTL

Normal Computing Corp. • Mountain View (CA)

Presencial
USD 140.000 - 210.000
RTL Design Engineer
RTL Design Engineer

Normal Computing Corp. • New York (NY)

Híbrido
USD 120.000 - 160.000
Hardware Engineer, Physical Design
Hardware Engineer, Physical Design

Normal Computing Corp. • Mountain View (CA)

Presencial
USD 180.000 - 240.000
Hardware Engineer, Physical Design
Hardware Engineer, Physical Design

Normal Computing Corporation • Palo Alto (CA)

Presencial
USD 210.000 - 260.000
Hardware Engineer, RTL Lead
Hardware Engineer, RTL Lead

Normal Computing Corporation • Mountain View (CA)

Presencial
USD 180.000 - 240.000
Hardware Engineer, FPGA
Hardware Engineer, FPGA

Normal Computing Corp. • Palo Alto (CA)

Presencial
USD 120.000 - 190.000
Hardware Engineer, PCB
Hardware Engineer, PCB

Normal Computing • New York (NY)

Presencial
USD 180.000 - 240.000
Hardware Engineer, DFT
Hardware Engineer, DFT

Normal Computing Corporation • Mountain View (CA)

Presencial
USD 140.000 - 210.000
Hardware Engineer, DFT
Hardware Engineer, DFT

Normal Computing Corp. • Mountain View (CA)

Presencial
USD 150.000 - 230.000
Hardware Engineer, DFT
Hardware Engineer, DFT

Normal Computing Corporation • Palo Alto (CA)

Presencial
USD 180.000 - 240.000
DFT architecture startup (bonus)
IEEE 1687 familiarity (IJTAG)
Memory redundancy / BISR knowledge
+3