Hardware Design Engineer - FPGA/Verilog (Server)

Supermicro; Wayne (CA); On-site; USD 90,000 - 105,000; Full time

Job summary

Supermicro is seeking a Hardware Design Engineer to develop in-house server motherboards. You will collaborate with cross-functional teams to ensure robust designs and high reliability.

Candidates should have a strong background in FPGA/CPLD design, SystemVerilog/Verilog/VHDL, and familiarity with server hardware architectures. The role emphasizes hands-on hardware bring-up, lab debugging, and IP core maintenance, with competitive salary and benefits.

Qualifications

• Bachelor’s degree in Electrical/Computer Engineering or Computer Science preferred/required.
• 1+ years FPGA/CPLD design and verification experience is a plus.
• Strong RTL programming with SystemVerilog/Verilog/VHDL.
• Experience with hardware communication protocols (I2C/SMBus/SPI/eSPI/JTAG).
• Experience with lab debugging tools for hardware bring-up.

Responsibilities

• Architect, RTL code, simulate, synthesize, and verify FPGA/CPLD logic for servers.
• Define system-level hardware requirements and board architecture with cross-functional teams.
• Design and implement server management logic including power sequencing and interface protocols.
• Perform hardware bring-up and debugging using logic analyzers and oscilloscopes.
• Maintain and optimize FPGA/CPLD IP cores and codebases.

Skills

RTL programming

SystemVerilog/Verilog/VHDL

Lab debugging

Server architecture knowledge

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Master's degree desirable

Tools

Lattice

Intel (Altera)

AMD (Xilinx)

I2C

SMBus

SPI

eSPI

PCIe

JTAG

Logic analyzers

Oscilloscopes

Job description

Supermicro is seeking a Hardware Design Engineer to develop in-house server motherboards. You will collaborate with cross-functional teams to ensure robust designs and high reliability.

Candidates should have a strong background in FPGA/CPLD design, SystemVerilog/Verilog/VHDL, and familiarity with server hardware architectures. The role emphasizes hands-on hardware bring-up, lab debugging, and IP core maintenance, with competitive salary and benefits.