3P Silicon Architect

OpenAI; San Francisco (CA); On-site; USD 342,000 - 555,000; Full time

Job summary

OpenAI is looking for a Hardware Architecture Expert in San Francisco to enhance AI infrastructure by collaborating with GPU and accelerator manufacturers.

You will evaluate hardware performance and translate vendor specifications into practical implications for AI workloads. A strong background in GPU architecture and hands-on experience in benchmarking are essential. OpenAI offers a hybrid work model and a competitive compensation range of $342K - $555K.

Qualifications

• Deep expertise in GPU or accelerator architecture.
• Hands-on experience with benchmarking and profiling.
• Strong understanding of memory systems and data movement bottlenecks.

Responsibilities

• Engage with silicon vendors on architectural tradeoffs.
• Analyze performance and efficiency of hardware.
• Run benchmarks to validate hardware performance.

Skills

GPU architecture knowledge

Benchmarking and performance analysis

Interconnect and scaling behavior

AI workload understanding

Technical engagement with vendors

Job description

About The Team

OpenAI’s Hardware organization develops system and infrastructure solutions optimized for advanced AI workloads. We collaborate across research, software, and external hardware partners to design and deploy next-generation AI systems at scale.

About The Role

We are seeking a 3P Hardware Architecture Expert with deep expertise in GPU and accelerator architectures to engage directly with silicon vendors and guide hardware decisions for AI infrastructure.

In this role, you will evaluate architectural tradeoffs across compute, memory, and interconnect systems, translating vendor specifications into real-world workload impact. You will play a critical role in early silicon evaluation, benchmarking, and performance validation, helping ensure that next-generation hardware meets the needs of our workloads.

This role is highly hands‑on and requires both deep technical understanding and the ability to engage at a high level with partners such as NVIDIA and AMD on architectural direction and design tradeoffs.

This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance.

Key Responsibilities

• Engage deeply with silicon vendors (e.g. NVIDIA & AMD) on GPU and accelerator architecture tradeoffs.
• Analyze and interpret performance, power, and efficiency characteristics of next‑generation hardware.
• Translate vendor specifications into expected real‑world performance for AI workloads.
• Evaluate architectural aspects including:
  • Compute throughput and utilization.
  • Memory systems (HBM, cache hierarchies, bandwidth constraints).
  • Data types and precision tradeoffs (FP16, BF16, FP8, etc.).
  • Interconnect and scaling behavior.
• Run benchmarks and profiling to validate hardware performance against workload requirements.
• Lead early bring‑up and evaluation of engineering sample (ES) silicon.
• Partner with performance modeling and system architecture teams to align measured vs. modeled behavior.
• Provide actionable feedback to vendors to influence future silicon design and roadmap decisions.

Qualifications

• Have deep expertise in GPU or accelerator architecture, including performance and power tradeoffs.
• Understand AI workload behavior and how it interacts with hardware design choices.
• Are comfortable engaging directly with silicon vendors at a technical architecture level.
• Have hands‑on experience with benchmarking, profiling, and performance analysis.
• Can translate low‑level hardware details into system‑level and workload‑level impact.
• Are equally comfortable in theory (architecture) and practice (measurement/validation).
• Thrive in environments where you bridge internal teams and external partners.

Preferred Skills

• Experience working with or at companies like (e.g. NVIDIA & AMD) or similar silicon providers.
• Familiarity with AI accelerator stacks, including GPUs, custom ASICs, or emerging architectures.
• Experience with early silicon bring‑up or hardware validation workflows.
• Strong understanding of memory systems (HBM, DDR, cache hierarchies) and data movement bottlenecks.
• Experience with performance tooling, microbenchmarks, and workload characterization.

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general‑purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

We are an equal‑opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.

For additional information, please see OpenAI’s affirmative action and equal employment opportunity policy statement. Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US‑based candidates.

To notify OpenAI that you believe this job posting is non‑compliant, please submit a report through the provided form. No response will be provided to inquiries unrelated to job posting compliance.

We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via the provided link.

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Compensation Range: $342K - $555K