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Cirrus Logic is seeking a Layout Design Intern to work with experienced design and circuit engineers on the physical layout and verification of high-performance mixed-signal CMOS ICs in Austin, TX. You will translate circuit designs into layouts, learn how layout choices affect performance, and use Cadence tools like Virtuoso XL and Calibre.
Interns will have opportunities to learn, ask questions, and contribute at a level that fits their experience.
Cirrus Logic is seeking a Layout Design Intern to work with experienced design and circuit engineers on the physical layout and verification of high-performance mixed-signal CMOS ICs in Austin, TX. You will translate circuit designs into layouts, learn how layout choices affect performance, and use Cadence tools like Virtuoso XL and Calibre.
Interns will have opportunities to learn, ask questions, and contribute at a level that fits their experience.