GPU Design Verification Engineer

Intel Corporation; Santa Clara (CA); Híbrido; USD 164.000 - 232.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Stock bonuses

Health benefits

Retirement plan

Descripción de la vacante

Intel Corporation is seeking a GPU Design Verification Engineer in United States (CA), Santa Clara. You will verify graphics logic components, develop reusable verification IP, and drive plans and tests across multi-team collaborations.

You will collaborate with GPU architects, RTL, and physical design teams to meet functional, performance, and power goals, while maintaining verification infrastructure and contributing to TFMs for functional design verification.

Formación

• Bachelor’s or Master’s degree in electronics, computer engineering, or related field with 4+–5+ years of experience.
• Experience with IP-level test benches, coverage, and verification.
• Strong programming skills in SystemVerilog and UVM.
• Experience with ASIC/CPU/GPU verification and test-plan development.

Responsabilidades

• Perform functional verification of graphics logic components (3D graphics, media, display).
• Define and develop scalable IP verification plans, test benches, and architecture.
• Execute verification plans, run system simulations, analyze power and timing, debug issues.

Conocimientos

SystemVerilog

UVM

Verification planning

Testbench development

Scripting (Python, Perl, Shell)

Educación

Bachelor’s degree in electronics or computer engineering

Master’s degree in electronics or computer engineering

Herramientas

SystemVerilog

UVM

Python

Perl

Shell scripting

Descripción del empleo

GPU Design Verification Engineer

Apply: US, California, Santa Clara; US, California, Folsom

Full time: Posted Today: JR0287454#

Job Details

Job Description

• Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.


• Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm graphics microarchitecture specifications.


• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.


• Replicates, root causes, and debugs issues in the pre-silicon environment.


• Finds and implements corrective measures to resolve failing tests.


• Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.


• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.


• Maintains and improves existing functional verification infrastructure and methodology.


• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications

• Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.


• Bachelor’s degree in electronics, computer engineering, or related engineering with 5+ years of experience.


• OR


• Master's degree in electronics, computer engineering, or related engineering with 4+ years of experience.


• In the following:
  
  
  
  • Test Bench bring-up at IP level and strong programming skills in System Verilog, and UVM.
  
  
  • Hands on verification experience working on ASIC, CPU or GPU.
  
  
  • Test Plan development experience at IP level with coverage closures.
  
  
  • Coverage driven verification testbench development, functional modeling and test writing.
  
  
  
  


• Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


• Understanding of Graphics architecture.


• Experience with industry standard frontend design and verification flows, tools, methodology.


• Experience with scripting shell, PERL, Python.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location

US, California, Santa Clara

Additional Locations

US, California, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.


• Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USD. The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

* Job posting details (such as work model, location or time type) are subject to change.