FPGA Verification Engineer

Anduril Industries; Waltham (MA); On-site; USD 166,000 - 220,000; Full time

Job summary

Anduril Industries seeks an experienced FPGA Verification Engineer to design and mature new product lines. You will collaborate across disciplines to define, implement, build prototypes, and drive ground and flight testing toward production.

The role emphasizes verification of RTL blocks, SystemVerilog/OVM/UVM, and continuous improvement of the verification flow. A strong background in HDL, VHDL/Verilog, and security clearance is required.

Qualifications

• ABachelor’s in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of experience developing HDL firmware for FPGA devices.
• Proven ability to design, implement, and execute verification testbenches for RTL blocks.
• Experience with VHDL/Verilog in FPGA/ASIC development environments.
• Experience with chip-level verification methods: constrained-random testing, functional coverage, assertion-based verification.

Responsibilities

• Define verification environment architecture using SystemVerilog/OVM/UVM.
• Create test plans, test cases, and coverage tracking.
• Develop testbenches for RTL blocks with VHDL/SystemVerilog.
• Suggest tools and practices to improve FPGA/ASIC verification flow.
• Provide technical leadership and planning for verification activities.

Skills

HDL firmware

SystemVerilog

VHDL

RTL verification

Git

Secret clearance

Education

Bachelor’s in Electrical Engineering

Tools

QuestaSim

Synplify

Quartus

Vivado

Git

Subversion

Job description

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century’s most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril’s family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years.

ABOUT THE TEAM

The Anduril Imaging team developsstate-of-the-artimaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies.The team is heavily involved inutilizingcomputer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage.

ABOUT THE JOB

The Imaging team is seeking a FPGA VerificationEngineer to help design a new productlines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products.

WHAT YOU’LL DO

• Verification environment architecture and design usingtools likeSystemVerilogorOVM/UVM
• Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking
• Testbench development for the verification of RTL blocks using VHDL orSystemVerilog
• Recommend new tools and practices for continuous improvement in the group’s ASIC / FPGA verification flow
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status

REQUIRED QUALIFICATIONS

• ABachelor’s in Electrical Engineering, Computer Engineering, or a related technical field is typicallyrequired.
• 8+ years of experience developing HDL firmware for FPGA devices
• Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
• experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
• Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/orSystemVerilog.
• experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
• Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, andmaintainconfiguration integrity.
• Eligible to obtain andmaintainan active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Experience with ASIC/FPGA lab validation and debug using standard lab equipment, along with familiarity with DFT, manufacturability, and production test concepts.
• Proficiencywith Unix/Linux environments,scriptingor software development (C, C++, Python, Perl, or shell), and industry-standard ASIC/FPGA simulation and synthesis tools such asQuestaSim,Synplify, Quartus, orVivado.

US Salary Range

$166,000—$220,000 USD

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril’s total compensation package. Additionally, Anduril offers top-tier benefits for full-time employees, including:

Benefits

At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you’re supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits.