FPGA Firmware Lead — Space Mission Systems

Jobtome

Town of Canandaigua (NY)

On-site

USD 111,000 - 206,000

Full time

6 days ago
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Benefits offered by this job

Health insurance
Disability insurance
401(k) match
Education assistance
Parental leave
Paid time off
Company holidays
Employee assistance program

Job summary

L3Harris Technologies is seeking an FPGA Design Engineer – Firmware Lead in Rochester, NY. You will lead FPGA firmware activities, decompose requirements to FPGA level, and architect solutions across multiple FPGA platforms.

You will guide small teams, enforce firmware processes, and develop HDL code and test environments for robust space-grade designs. The role emphasizes collaboration, rigorous verification, and end-to-end FPGA development for mission systems.

Qualifications

  • Bachelor’s Degree in engineering or related field; years of experience as specified.
  • Ability to obtain Federal Secret security clearance.

Responsibilities

  • Lead FPGA Firmware Engineering activities for Space Mission Systems segment.
  • Decompose system requirements to FPGA requirements and specifications.
  • Architect FPGA solutions and implement across various FPGA technologies.
  • Lead small engineering teams in FPGA development.
  • Develop HDL code and testbenches; create verification environments.
  • Map FPGA work products to system-level requirements and capabilities.
  • Synthesize designs and perform place-and-route with timing analysis.
  • Integrate and test FPGA on circuit card assembly.

Skills

Security clearance eligibility
Team leadership
FPGA design understanding

Education

Bachelor’s Degree in Engineering
Graduate Degree (optional)

Tools

VHDL
Xilinx tools
Intel/Quartus tools
Git
Subversion

Job description

L3Harris Technologies is seeking an FPGA Design Engineer – Firmware Lead in Rochester, NY. You will lead FPGA firmware activities, decompose requirements to FPGA level, and architect solutions across multiple FPGA platforms.

You will guide small teams, enforce firmware processes, and develop HDL code and test environments for robust space-grade designs. The role emphasizes collaboration, rigorous verification, and end-to-end FPGA development for mission systems.

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