FPGA Engineer Engineer (eInfochips)

Arrow Electronics; San Jose (CA); On-site; USD 120,000 - 150,000; Full time

Job summary

Arrow Electronics is looking for a skilled FPGA Engineer to join their eInfochips team in San Jose, California. The role demands proficiency in Verilog/System Verilog and experience with EDA tools such as Fusion Compiler.

The ideal candidate will have over 9 years of experience in the field and will ensure customer satisfaction while reporting on project progress. The role requires a fully onsite work arrangement, which may include travel to client locations as necessary.

Qualifications

• 9+ years of experience in relevant technical field.
• Strong understanding of RTL design and digital concepts.
• Ability to ensure customer satisfaction.

Responsibilities

• Proficient in Verilog/System Verilog coding.
• Report to customers on daily or weekly progress.
• Travel to client office locations as required.

Skills

Verilog/System Verilog

EDA tools (Fusion Compiler, CDC)

Scripting (Python, Tcl, Perl)

High speed PCIe designs

Static Timing Analysis

Tools

VCS

Questa CDC

Job description

## FPGA Engineer Engineer (eInfochips)Applylocations: US-CA-San Jose, California: Austin-Texas (Amazon)time type: Full timeposted on: Posted Yesterdayjob requisition id: R245638# **Position:**FPGA Engineer Engineer (eInfochips)# **Job Description:**Job Description**Location: San Jose CA and Austin TX (Day-1 Onsite)****Experience: 9+ Years****What candidate will Be Doing:*** Proficient in Verilog/System Verilog coding constructs.* Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)* Experience with high speed PCIe designs and protocols.* Experience with Industry standard interface protocols such as AXI, APB, etc.* Experience with ARM Fabric IPs.* Experience with IPXACT.* Understanding of Computer Architecture fundamentals.* Ability to write scripts using Python, Tcl, Perl etc.* Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus.* Proficiency with UPF (Low power intent)* Proficiency in clock crossing techniques.* Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals.**What we are looking for:*** Good in understanding RTL Design and Digital concepts* Strong experience with EDA tools: Fusion Compiler, CDC* Scripting: Pearl, Python, TCL* At-least 5+ years of experience in Verilog Design* AMBA AXI bus along-with ARM or C based processor* Ensure customer satisfaction.* Reporting to customers on daily or weekly progress effectively**Work Arrangement Fully Onsite:**Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.**Location: San Jose CA and Austin TX (Day-1 Onsite)****About eInfochips:**eInfochips**,**an Arrow company (Fortune#154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services acrossvarious industries & verticals.Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries C verticals.EEO Statement:Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.# **Location:**US-CA-San Jose, California (eInfochips)# **Time Type:**Full time# **Job Category:**Engineering Services# **EEO Statement:**Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)*All Arrow job postings are for existing job vacancies*. *We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.*