FPGA Design Verification Engineer – Hybrid @ San Diego, CA

DRS IT Solutions Inc; San Diego (CA); On-site; USD 90,000 - 130,000; Full time

Job summary

A leading company in IT Services and Consulting is seeking a Mid-Senior level FPGA Engineer to support debug, simulation, and testing activities. The ideal candidate will have extensive experience with VHDL, FPGA design, and related hardware development tools. This contract role offers an opportunity to work in a dynamic environment with a focus on innovative technology solutions.

Qualifications

• Professional experience in writing and updating VHDL RTL.
• Advanced FPGA design experience with VHDL.
• Proficient in automated test bench verification.

Responsibilities

• Support FPGA debug, simulation, and test activities.
• Create updated RTL designs and support test case generation.
• Support functional and software integration.

Skills

VHDL RTL

FPGA design

SystemVerilog

Timing simulation

QuestaSim

FPGA concepts

Tools

Vivado

Altera development tools

Job description

This job description provides detailed information about the role, responsibilities, skills, and company details. However, it can be improved for clarity and readability by restructuring some sections and removing repetitive or irrelevant content. Here's a refined version:

Support FPGA Debug, Simulation, and Testing Activities

• Support FPGA debug, simulation, and test activities for existing platforms for defined features/escalations.
• Create updated RTL designs for identified issues and block-level simulations utilizing UVMF.
• Support test case generation for UVMF.
• Support mono, functional, and software integration through customer delivery.

Hard Skills (Required with demonstrated professional experience):

• Writing and updating VHDL RTL.
• Advanced FPGA design using VHDL and module/multi-module verification with SystemVerilog.
• Proficient with automated self-checking test bench verification (QuestaSim) in UVM.
• Ability to perform timing simulation, post-route simulation, and static timing analysis.
• Experience with hardware development tools and IDEs for Xilinx devices (e.g., Vivado).
• Proficiency in FPGA concepts, architectures, and protocols (SOC, bus topology, CDC, PCIe, TSN, UART, SPI, AXI, PTP, SRIO, etc.).

Nice to Have:

• Experience with Siemens UVMF.
• Experience with Xilinx Zynq UltraScale+ MPSOC.
• Additional experience with Altera development tools.

Soft Skills:

• Ability to read and interpret data, information, and documents.
• Creative problem-solving skills for complex issues.
• Attention to detail and high accuracy in completing assignments.
• Ability to work effectively in demanding environments with changing workloads and within deadlines.
• Clear and professional communication skills.
• Ability to establish and maintain cooperative working relationships.

Company Details:

DRS IT Solutions Inc, 28175 Haggerty Road, Novi, MI 48377

Contact: (C) 248-440-7600 EXT-1 | [e-mail] | www.drsitsolutions.com

Certified Women Business Enterprise (WBENC), Women-Owned Small Business (WOSB), E-Verified

Job Details:

• Seniority level: Mid-Senior level
• Employment type: Contract
• Job function: Engineering and Information Technology
• Industries: IT Services and IT Consulting