Founding Silicon Engineer

Empathy Talent; San Francisco (CA); Sur place; USD 200 000 - 300 000; Plein temps

Avantages offerts par ce poste

Equity

Health benefits

401(k)

Equipment budget

Résumé du poste

Empathy Talent is partnering with an early-stage AI semiconductor startup building next-generation computing hardware to power demanding AI workloads. Backed by a highly technical founding team, the company focuses on high-performance AI accelerators with efficiency, scalability, and performance.

This Founding Silicon Engineer role leads the development of custom silicon for AI accelerators, from FPGA prototyping to ASIC tapeout and bring-up.

Qualifications

• Strong background in RTL design, pipelining, timing, and microarchitecture.
• Hands-on FPGA development from RTL to validation on hardware.
• Proficient in Verilog/SystemVerilog for ASIC development.
• Experience with simulation, linting, synthesis, timing closure, and CDC.
• Experience automating hardware design flows using Python/Tcl/Make/Nix.

Responsabilités

• Lead development and optimization of FPGA prototypes for AI accelerator architectures.
• Design, implement, and review synthesizable RTL for custom ASIC development.
• Architect high-performance datapaths, memory subsystems, and interconnects.
• Establish and maintain RTL development flows: linting, simulation, synthesis, timing analysis, verification.
• Develop synthesis constraints, perform timing closure, optimize for power, performance, and area.

Connaissances

RTL design

FPGA development

Digital design

Architectural decisions

Cross-disciplinary collaboration

Outils

Verilog/SystemVerilog

Python

Tcl

Make

Nix

SDC constraints

Description du poste

Empathy Talent is partnering with an early-stage AI semiconductor startup developing next-generation computing hardware designed to power increasingly demanding artificial intelligence workloads.

Backed by a highly technical founding team, the company is building high-performance AI accelerator technology focused on delivering exceptional compute efficiency, scalability, and performance. This is an opportunity to join at the ground level and help shape both the product and the future direction of the organization.

The Opportunity

Our client is seeking a Founding Silicon Engineer to lead the development of custom silicon for next-generation AI accelerators, from initial FPGA prototyping through ASIC tapeout and bring-up.

Working alongside a highly technical founding team, you'll drive architectural decisions, design and optimize digital logic, establish RTL development and verification flows, and play a central role in bringing the company's first ASIC to production.

This position is ideal for engineers who enjoy solving complex hardware challenges, thrive in early-stage startup environments, and want significant ownership over technical direction and execution.

Key Responsibilities

• Lead development and optimization of FPGA prototypes for high-performance AI accelerator architectures
• Design, implement, and review synthesizable RTL using Verilog and SystemVerilog for custom ASIC development
• Architect high-performance compute datapaths, memory subsystems, on-chip interconnects, and control logic
• Establish and maintain RTL development flows, including linting, simulation, synthesis, timing analysis, and verification
• Develop synthesis constraints, perform timing closure, and optimize designs for power, performance, and area (PPA)
• Perform RTL quality checks through linting, clock domain crossing (CDC) analysis, verification, and code reviews
• Develop and maintain hardware design automation using Python, Tcl, Make, Nix, or similar tools
• Drive silicon development from FPGA validation through ASIC tapeout and hardware bring-up
• Collaborate with PCB, interconnect, systems, and software engineering teams on hardware integration
• Contribute to technical direction, architectural decisions, and the growth of the silicon engineering team

What We're Looking For

• Strong background in digital design fundamentals, including RTL design, pipelining, clock/reset architecture, latency, throughput, and microarchitecture
• Hands‑on FPGA development experience taking designs from RTL through implementation and validation on physical hardware
• Strong proficiency designing synthesizable RTL using Verilog and/or SystemVerilog
• Experience with simulation, linting, synthesis, SDC constraints, timing closure, and clock domain crossing (CDC)
• Experience developing and automating hardware design flows using Python, Tcl, Make, Nix, or similar tools
• Strong understanding of compute datapaths, memory architectures, bandwidth optimization, and latency‑sensitive digital systems
• Experience developing AI accelerators, high-performance compute architectures, or low‑level AI kernels
• Ability to make architectural decisions across compute, memory, interconnect, and control systems
• Comfortable taking broad technical ownership and working across multiple engineering disciplines
• Strong independent learning ability and a first‑principles approach to solving complex engineering problems

Preferred Qualifications

• Previous ASIC tapeout experience through industry or academic projects
• Experience developing and validating large‑scale FPGA prototypes
• Experience integrating high‑speed interfaces and complex hardware subsystems
• Familiarity with formal verification, UVM, cocotb, or advanced RTL verification methodologies
• Exposure to firmware, device drivers, hardware/software integration, or system bring‑up
• Experience working on AI accelerators, GPUs, custom compute architectures, or other high‑performance digital hardware
• Previous experience in an early‑stage semiconductor or hardware startup

What's on Offer

• Competitive base salary of $200,000–$300,000 and meaningful equity participation
• Opportunity to join as one of the company's earliest silicon engineering hires
• Significant technical ownership with direct influence over product architecture and silicon development
• Direct collaboration with a highly technical founding engineering team
• Opportunity to help build and lead the silicon engineering organization as the company scales
• Medical, dental, and vision coverage, 401(k), and equipment and gym support