Founding Circuit Design Architect

SBT; San Francisco (CA); On-site; USD 180,000 - 280,000; Full time

Job summary

SBT, the exclusive executive recruiting firm for a confidential memory technology position in San Francisco, seeks a PhD-level device physicist turned memory circuit designer. You’ll work on transistor-level memory cells, learn from first principles, and drive designs toward silicon realities.

You will collaborate with senior designers to tape out and test chips, bring up silicon in the lab, and iterate architectures based on measured data to push the boundaries of SRAM/DRAM and emerging memory

Qualifications

• PhD in memory circuit design or closely related field.
• Strong understanding of transistor and device physics from first principles.
• Experience with Cadence Virtuoso, SPICE and Monte Carlo analysis.
• Experience with SRAM/DRAM or emerging non-volatile memory.

Responsibilities

• Understand device physics of novel memory and translate to circuit design decisions.
• Design and simulate transistor-level memory circuits (bitcells, sensing, write paths, periphery).
• Turn designs into layout and test chips with senior designers through tapeout.
• Bring up and characterize silicon in the lab and compare results to theory.
• Propose new circuit ideas and influence memory architecture.

Skills

Device physics fundamentals

Problem solving

Circuit design concepts

Education

PhD in memory circuit design

Tools

Cadence Virtuoso

SPICE

Monte Carlo analysis

Job description

SBT is the exclusive executive recruiting firm for this confidential position.

This leading memory company is building a new class of memory technology from the ground up, rethinking how data is stored and accessed at the device and circuit level. Backed by deep expertise in semiconductor physics and circuit design, the team is turning first-principles innovation into silicon that addresses the growing memory demands of AI and high-performance computing. Engineers here work on problems with no existing playbook, where understanding why a design works matters as much as building it.

Role

• Develop a deep understanding of the underlying device physics and transistor behavior of a novel memory technology, and translate that understanding into circuit design decisions.
• Design and simulate transistor-level memory circuits, such as bitcells, sensing, write paths and array periphery, using SPICE and Monte Carlo analysis to explore margins, variation and stability.
• Turn your circuit designs into layout and test chips, working closely with senior designers through tapeout.
• Bring up and characterize silicon in the lab, comparing measured results against theory and simulation to understand why the circuits behave as they do.
• Feed what you learn from silicon back into the next design iteration, proposing new circuit ideas and helping shape the architecture of a memory with no prior design to follow.

Qualifications

• PhD in a relevant technical field to memory circuit design (recent graduates or a current postdocs)
• Strong understanding of transistor and device physics, with the ability to reason from first principles about how devices and circuits behave.
• Hands-on experience with transistor-level circuit design and simulation tools such as Cadence Virtuoso, SPICE and Monte Carlo analysis, ideally including layout, tapeout or silicon testing.
• Knowledge of memory circuits such as SRAM, DRAM or emerging non-volatile memory, along with strong problem-solving and communication skills.