Formal Validation Engineer

AECOM; Cupertino (CA); On-site; USD 143,000 - 215,000; Full time

Job summary

A leading technology company is seeking a Formal Validation Engineer in Cupertino, California. This role involves the complete formal verification of various design blocks and IPs, working alongside top engineers to improve micro-architecture and establish efficient verification methodologies. Candidates should possess a Master's degree and relevant experience in design verification techniques.

Benefits

Comprehensive medical and dental coverage

Retirement benefits

Employee stock purchase program

Educational reimbursements

Discounted products and free services

Qualifications

• Master’s degree or foreign equivalent in Electrical Engineering or related field.
• 2 years of experience in design verification techniques and tools.

Responsibilities

• Work on formal verification for design blocks and IPs.
• Develop and implement verification test plans.
• Craft solutions for verifying complex designs.

Skills

Design verification

Verilog

System Verilog

Scripting languages

C

C++

RTL debugging

Education

Master’s degree in Electrical Engineering

Job description

Formal Validation Engineer

**Cupertino, California, United States**

**Hardware**

**Summary**

Posted: **Jun 05, 2025**

Weekly Hours: **40**

Role Number: **200607036**

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn’t have imagined, and now, can’t imagine living without. It’s the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

**Description**

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work on the complete formal verification for single or multiple design blocks and IP’s (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.). Work with Apple Silicon’s world-class SOC and IP design engineers to develop formal micro-architecture specifications. Develop comprehensive verification test plans. Help improve micro-architecture by proving properties, finding bugs and performing digital logic design and computer architecture. Craft novel and creative solutions for verifying complex design micro-architectures. Develop and implement re-usable and optimized formal models and verification code base. Architect correct-by-construction design methodologies for improved formal verification efficiency and productivity. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 - $214,500/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

**Minimum Qualifications**

+ Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering or related field, and 2 years experience in the job offered or related occupation.

+ 2 years of experience in each of the following skills is required:

+ Utilizing design verification techniques, tools, and methodologies to verify and improve chip design and architecture.

+ Designing and implementing a verification environment using Verilog, System Verilog.

+ Experience architecting correct-by-construction design methodologies for improved verification efficiency.

+ Utilizing scripting language skills to develop and maintain verification infrastructure.

+ Leveraging programming language skills such as C and C++ to verify complex data path designs.

+ Utilizing DV skills to run regressions, including experience in root cause failing designs, bug tracking, and analyzing coverage.

+ Utilizing SoC design and verification knowledge to drive and maintain deliverables and support cross-functional engineering.

+ Leveraging design knowledge to drive design teams and improve SoC architecture.

+ Utilizing RTL debugging and digital system design to achieve the performance and functional goals of the design.

**Preferred Qualifications**

+ N/A

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088\_EEOC\_KnowYourRights6.12ScreenRdr.pdf) .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088\_EEOC\_KnowYourRights6.12ScreenRdr.pdf) .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program (https://www.apple.com/jobs/pdf/EverifyPosterEnglish.pdf) .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.