Firmware Memory Engineer

Advanced Micro Devices; Austin (TX); On-site; USD 90,000 - 130,000; Full time

Benefits offered by this job

Innovative work culture

Open to relocation (Boxborough, MA)

Diverse workplace inclusion

Job summary

Advanced Micro Devices in Austin, TX is seeking a Firmware Designer for advanced Memory IO development. This role involves firmware design for high-speed LPDDR, DDR, and inter-chip IO IPs, including pre/post-silicon work.

The ideal candidate will have expertise in C/C++, scripting languages, and digital simulation, paired with a strong technical background. A Bachelor's degree in Electrical or Computer Engineering is required. AMD offers an inclusive work environment focused on innovation and collaboration.

Qualifications

• Excellent knowledge of C, C++, and scripting languages.
• Good knowledge of digital simulation debugging.
• Post-silicon experience in firmware development required.
• Strong understanding of computer organization and architecture.

Responsibilities

• Design and develop firmware for DDR PHY and DRAM training steps.
• Pre-silicon coding and simulation against architectural models.
• Post-silicon lab bring-up and optimization of firmware.
• Work with firmware teams to define features and specifications.

Skills

C/C++ programming

Scripting languages (e.g., Python)

Verilog/SystemVerilog

Analytical problem-solving

Interpersonal communication

Education

Bachelor’s degree in Electrical or Computer Engineering

Master’s or PhD degree (preferred)

Tools

Oscilloscopes

Logic analyzers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

THE ROLE

The Memory IO team is looking for a passionate and experienced firmware designer for the pre/post‑silicon development of high‑speed LPDDR, DDR and inter‑chip IO IPs. Be a part of the definition, design and development and productization phase of industry‑leading Memory PHYs and interface IP. This opportunity includes enabling of new PHY designs at the microarchitecture, firmware/hardware co‑design, and algorithm design level.

Be a part of a team that delivers industry‑leading IP and help our experts in RTL, FW, circuit and architecture teams develop leading edge Memory interfaces.

THE PERSON

Will have strong analytical/problem‑solving skills and pronounced attention to details. Must be a self‑starter, and able to independently drive tasks to completion. Will have strong interpersonal and communication skills.

RESPONSIBILITIES

• Firmware design and development of DDR PHY & DRAM training steps
• Firmware development of DDR PHY for ATE testing, IP char & SoC power
• Pre‑silicon FW coding and simulation against architectural and RTL models
• Post‑silicon lab bring‑up and optimization of DDR init and run time FW
• Post‑silicon DDR training enhancements to enable robust links for higher reliability / higher frequency margin
• Working with SoC/product firmware teams to define features and specs

PREFERRED EXPERIENCE

• Excellent knowledge of C, C++ and any scripting language, such as Python.
• Good knowledge of Verilog/SystemVerilog and digital simulation debug.
• Ability to adapt, learn new toolsets and frameworks is required.
• Strong understanding of synchronization techniques (handshakes, message passing); knowledge of hardware level clocking and synchronization is a plus.
• Post‑silicon experience developing firmware on real hardware is required. Experience with SERDES, DDR, memory controller design experience is preferred.
• Strong understanding of computer organization/architecture.
• Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc.
• Experience with low‑level, physical phenomena‑oriented logic design is an asset (dealing with IO, clocking, voltage control, etc.)

ACADEMIC CREDENTIAL

• Bachelor’s degree in Electrical or Computer engineering is strongly desired. Master’s or PhD degree is a plus.

LOCATION

Austin, TX - Open for Boxborough, MA

This role is not eligible for visa sponsorship.

Benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.