Field-Programmable Gate Arrays Engineer

Belcan

Cedar Rapids (IA)

On-site

USD 72,000 - 103,000

Full time

2 days ago
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Benefits offered by this job

Health care
Dental
Vision
Life insurance
401(k)
Education assistance
PTO & holidays

Job summary

Belcan is seeking a Principal FPGA Engineer contractor to join our ART Microelectronics Technology team in Cedar Rapids. You will design, verify, and integrate high-performance FPGAs for defense solutions, leading development efforts and ensuring rigorous quality.

You will collaborate in an Agile environment, review artifacts, mentor peers, and push for improved FPGA toolchains and processes while delivering on-time, within scope and budget.

Qualifications

  • Requires STEM degree with 8+ years experience or advanced degree with 5+ years
  • ≥5 years FPGA development or ASIC frontend experience
  • Proficient in Verilog/VHDL for FPGA/ASIC design
  • Experience in digital circuit architecture, timing analysis, and timing closure
  • Familiar with FPGA platforms (Xilinx/AMD, Altera, Microchip) and toolchains (Vivado, Quartus, Libero)
  • Strong debugging and troubleshooting skills for FPGA/ASIC systems
  • Version control experience (Git, Subversion)

Responsibilities

  • Adhere to engineering processes, procedures and guidelines
  • Participate in Agile team meetings and planning
  • Requirements, design and verification of FPGA solutions
  • Integration of FPGA on target hardware units
  • Support peer reviews and certification activities
  • Peer reviewing FPGA development artifacts
  • Recommend improvements to FPGA design flow
  • Contribute to engineering estimates and status reporting

Skills

FPGA design
Verilog/VHDL
ASIC front end
Timing analysis
Git/Subversion
Debugging
High-speed interfaces
Team leadership

Education

STEM degree
Advanced degree

Tools

Vivado
Quartus
Libero
Git
Subversion

Job description

Keyword's: #CEDARRAPIDSjobs; #Electricaljobs.

Start Date: Immediate

We provide a competitive pay and benefits package. This position is offering a pay rate of $63.66/hr, however, Belcan considers several factors when extending an offer, including but not limited to education, experience, geographic location, and discipline. Benefits offered may include health care, dental, vision, life insurance; 401(k); education assistance; paid time off including PTO, holidays, and any other paid leave required by law.

Job Description:
Principal FPGA Engineer

Client is seeking a highly skilled and innovative Principal FPGA Engineering Contractor to work with our Applied Research and Technology (ART) Microelectronics Technology team. Your work will contribute to the development of cutting-edge defense solutions across Mission Systems, leveraging your expertise in the design, implementation, verification, and integration of a wide variety of high-performance digital FPGAs.

What You Will Do
  • Adhere to all applicable Client Engineering Development and Quality processes, procedures, instructions and guidelines.
  • Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.
  • Requirements, design and verification of FPGA solutions
  • Integration of developed FPGA on target hardware units
  • Supporting peer reviews and certification analysis activities
  • Peer reviewing FPGA development artifacts
  • Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA design flow
  • Contribute to engineering estimates for new program pursuits.
  • Provide technical leadership for project design teams by breaking down work, planning activities, and reporting status
Qualifications You Must Have
  • Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 8 years prior relevant experience or an Advanced Degree in a related field and minimum 5 years of experience.
  • A minimum of 5 years professional experience in FPGA development, ASIC front end, or related areas
  • Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.
  • Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure
  • Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated toolchains (e.g., Vivado, Quartus, Libero).
  • Strong debugging and troubleshooting skills for FPGA/ASIC systems.
  • Proficiency with revision control concepts and tools (e.g., Git, Subversion)
Qualifications We Prefer
  • Excellent communication and teamwork skills with the ability to work in a collaborative environment.
  • Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet).
  • Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)
  • Experience in ASIC / FPGA lab validation using advanced laboratory equipment
  • Experience with Unix, scripting, C/C++, and/or Perl
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