Field-Programmable Gate Array (FPGA) Engineer

Austin Sensing Company; Austin (TX); Presencial; USD 110.000 - 160.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

401(k)

Insurance benefits

Lunch and dinner served daily

Descripción de la vacante

Austin Sensing Company designs and manufactures radar, acoustic, and RF sensors in Austin, Texas, focusing on reliable, affordable high-performance sensing. We build hardware here and seek FPGA engineers to develop digital logic for data acquisition, processing, timing, and interfaces.

You’ll work with RF, electrical, signal processing, and embedded engineers to turn sensor data into real-time information, ensuring timing, debugging hardware, and delivering repeatable verification workflows.

Formación

• Experience developing FPGA designs from RTL through verification and hardware deployment.
• Proficiency in Verilog, SystemVerilog, or VHDL.
• Strong understanding of synchronous digital design, clock-domain crossings, timing constraints, and reset strategies.
• Experience with FPGA simulation, synthesis, implementation, and timing analysis.
• Experience building pipelined processing architectures and managing memory and data flow.

Responsabilidades

• Design and implement FPGA logic for sensor data acquisition, signal processing, and control.
• Collaborate with RF, electrical, signal processing, and embedded engineers to translate algorithms into hardware.
• Develop testbenches and verification workflows for robust hardware.
• Own timing constraints and timing closure for designs.
• Bring up new hardware and debug data integrity and timing issues.

Conocimientos

Verilog/SV/VHDL

HDL: Verilog/SystemVerilog/VHDL

FPGA timing

Oscilloscope debugging

Data pipelines

Embedded systems

Interfaces

Educación

Bachelor's degree in Electrical Engineering

Herramientas

Oscilloscopes

Logic analyzers

FPGA development tools

FPGA platforms (AMD/Xilinx or Intel/Altera)

High-speed interfaces (JESD204, LVDS, PCIe)

Python or Tcl for test automation

Descripción del empleo

Building the future of sensing is extremely hard work. We move fast, tackle difficult technical problems, and expect a lot from one another. We look for self-starters who take ownership and deliver. If you are looking for a traditional 9-to-5, this is not the place for you.

But if you want to build advanced sensing systems in Austin, strengthen U.S. military capabilities, protect American warfighters, support public safety and aerial firefighting, and work alongside operators in the field, we want to hear from you.

Why Austin Sensing Co.

We design and manufacture vertically integrated sensing systems for defense, public safety, and critical infrastructure. Our products are deployed in demanding environments where failure is not an option. Built in America and headquartered in Austin, Texas.

OPEN ROLES

Field-Programmable Gate Array (FPGA) Engineer

Location

Austin, TX

On-site

Software

About Austin Sensing Company

Austin Sensing Company builds radar, acoustic, and RF sensors for defense, public safety, critical infrastructure, and autonomous systems. We design and manufacture our hardware in Austin, Texas, with a focus on making high-performance sensing reliable, affordable, and widely available.

About the Role

We’re hiring an FPGA Engineer to develop the digital logic behind our sensing systems. You’ll own FPGA designs for high-speed data acquisition, signal processing, timing, and hardware interfaces, taking them from architecture and simulation through implementation and field testing.

You’ll work closely with RF, electrical, signal processing, and embedded systems engineers to turn sensor data into usable information in real time. We’re looking for someone who can design reliable logic, close timing, and debug the implementation on hardware.

What You’ll Do

Design and implement FPGA logic for sensor data acquisition, signal processing, and control.

Work with signal processing engineers to translate algorithms into efficient, verified hardware implementations.

Build streaming data pipelines that meet throughput, latency, and resource requirements.

Integrate high-speed ADCs, DACs, memory, and communications interfaces.

Develop testbenches and simulations to verify functionality before hardware testing.

Own synthesis, implementation, timing constraints, and timing closure for your designs.

Design reliable clock-domain crossings, reset sequences, and synchronization between components.

Bring up new hardware alongside electrical and embedded systems engineers.

Debug data integrity, interface, and timing issues using lab equipment and FPGA debug tools.

Document interfaces, resource utilization, and performance results, and maintain repeatable verification workflows.

What You’ll Bring

Experience developing FPGA designs from RTL through verification and hardware deployment.

Proficiency in Verilog, SystemVerilog, or VHDL.

Strong understanding of synchronous digital design, clock-domain crossings, timing constraints, and reset strategies.

Experience with FPGA simulation, synthesis, implementation, and timing analysis.

Experience building pipelined processing architectures and managing memory and data flow.

Hands-on debugging skills using oscilloscopes, logic analyzers, and FPGA debug tools.

The ability to balance throughput and latency with logic, memory, and power constraints.

Clear technical communication and comfort working across engineering disciplines.

Preferred Experience

Experience with radar, RF systems, or high-rate sensor data processing.

Experience with AMD/Xilinx or Intel/Altera FPGA platforms and development tools.

Familiarity with JESD204, LVDS, DDR memory, PCIe, or DMA architectures.

Experience implementing fixed-point arithmetic, FFTs, digital filters, and other DSP functions.

Experience with SoC FPGA platforms and interfaces between programmable logic and processors.

Familiarity with Python or Tcl for test automation and build tooling.

A degree in electrical engineering, computer engineering, or a related field.

401(k)

Insurance benefits

Lunch and dinner served daily