Field Application Engineer

Siemens Mobility; California (MO); Hybrid; USD 150,000 - 193,000; Full time

Job summary

Siemens Industry Software Inc. in Santa Clara, CA is seeking a Field Application Engineer for multiple positions. You will provide technical leadership in verification technologies and integrate DVT products to ensure customer environment success.

The role involves visiting customer sites, engineering demonstrations, and delivering training while collaborating with sales and product teams. This hybrid role allows some telecommuting from a commutable distance, with up to 25% travel.

Qualifications

• Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering or related field.
• Minimum 36 months of experience in Field Application Engineer-related role.
• Experience with SV/UVM verification methodologies and HDL-based design.

Responsibilities

• Provide technical leadership in sales and support of Verification technologies.
• Integrates DVT products and services at block/chip/system level and ensures expected behavior.
• Deliver customer training and white papers on verification topics.

Skills

Verilog

VHDL

SystemVerilog/UVM

Testbench development

Python scripting

C/C++

RTL debugging

Education

Bachelor’s degree in Electrical/ Electronics/ Computer Engineering

Tools

Python

Perl

Job description

Employer: Siemens Industry Software Inc.

Job Title: Field Application Engineer [MULTIPLE POSITIONS]

Job Location: Santa Clara, CA

Job Type: Full Time

Rate of Pay: The salary range for this position in Santa Clara, CA is $150,426 - $192,960 per year and this role may be eligible to earn incentive compensation. Siemens offers a variety of health and wellness benefits to employees. Details regarding our benefits can be found here: www.benefitsquickstart.com. In addition, this position is eligible for time off in accordance with Company policies, including paid sick leave, paid parental leave, PTO (for non-exempt employees) or non-accrued flexible vacation (for exempt employees).

Duties

Provide technical leadership in the sales and support of a wide range to Functional Verification technologies for Company’s EDA leading edge customers in Silicon Valley; Integrates DVT products and services (at the block/chip/system level) and ensures expected behavior in customer's environments; Perform assessments of customer environments and requirements,

providing expertise on topics such as: Verification planning, Testbench development using SV/UVM methodologies, Failure analysis and resolution, Coverage analysis, RTL/Gate- simulations performance optimization and competitive replacement, Regression debug and other flow/infrastructure development and testing; Accountable for the uncovering, scoping, and technical validity of the solutions to achieve the customer's design and verification objectives; Keeps other technical peers (country wide) informed of new and emerging technologies, share best practices and information; Become a trusted advisor to customer's business problems and eventually earns the trust to influence customer's decision process and business objectives; Articulate customer’s technical needs and requirements to product engineering, influence and shape product direction; Deliver ongoing customer training classes and consulting related to advance verification topics, as well as assist in driving the adoption of these into customer design and verification process, participate in developing technical white papers, attend local and regional technical seminars and technology conferences to educate and promote DVT solutions and network with attendees. Up to 25% domestic travel required. May telecommute from a commutable distance. [Hybrid role.]

Requirements

Employer will accept a Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Nanotechnology or related field and 36 months of experience in the job offered or in a Field Application Engineer-related occupation.

Position requires experience in the following

1. Designing and implementing digital logic using HDLs (Verilog, VHDL), HVLs (SystemVerilog/UVM, OVM, AVM, Vera, Specman, OOP), SystemC, and applying verification methodologies such as directed testing, constrained random testing, UPF, coverage modeling, and assertionbased verification.
2. Creating advanced test benches and performing simulation of complex SoC environments, including generating makefiles and developing automation scripts in Python, Perl, and C/C++.
3. Troubleshooting, triaging, and debugging RTL and verification environments, and performing simulator performance tuning to improve regression efficiency and runtime.
4. Analyzing semiconductor IC technologies, including ASIC and SoC architectures, memory subsystems, interconnect protocols, CPU microarchitectures, and embedded system components.

Referral Program

Incentives offered through the Company’s Employee Referral Program are applicable to this position.

Equal Employment Opportunity Statement

Siemens is an Equal Opportunity Employer encouraging inclusion in the workplace. All qualified applicants will receive consideration for employment without regard to their race, color, creed, religion, national origin, citizenship status, ancestry, sex, age, physical or mental disability unrelated to ability, marital status, family responsibilities, pregnancy, genetic information, sexual orientation, gender expression, gender identity, transgender, sex stereotyping, order of protection status, protected veteran or military status, or an unfavorable discharge from military service, and other categories protected by federal, state or local law.

EEO is the Law

Applicants and employees are protected from discrimination on the basis of race, color, religion, sex, national origin, or any characteristic protected by Federal or other applicable law.

Reasonable Accommodations

If you require a reasonable accommodation in completing a job application, interviewing, completing any pre-employment testing, or otherwise participating in the employee selection process, please fill out the accommodations form by clicking on this linkAccommodationfor disability form . If you’re unable to complete the form, you can reach out to our AskHR team for support at 1-866-743-6367. Please note our AskHR representatives do not have visibility of application or interview status.

Pay Transparency

Siemens follows Pay Transparency laws.

Application Deadline

This role will be posted for a minimum of five (5) days from the original posting date. The posting timeline may change based on applicant volume to ensure we attract and consider a strong and representative candidate pool.

California Privacy Notice

California residents have the right to receive additional notices about their personal information. To learn more, clickhere.

Criminal History

Qualified applications with arrest or conviction records will be considered for employment in accordance with applicable local and state laws.

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