Engineer|6254 Engineer|6254

ALTEN; San Diego (CA); Hybrid; USD 100,000 - 130,000; Full time

Job summary

ALTEN is seeking a SOC/Emulation Parametric Validation Engineer in San Diego, California. The candidate will work with a diverse team to ensure the performance (Vmin/Fmax) of next-generation SoCs, requiring excellent digital and SoC architecture design knowledge. Responsibilities include verifying performance features, identifying issues, and developing tuning methodologies.

The ideal candidate should have a Bachelor's or Master's degree in Computer or Electrical Engineering, with skills in systems validation and silicon debugging, as well as proficiency in Python and scripting.

Qualifications

• Strong understanding of SoC/CPU architectures (ARM or x86).
• Familiarity with voltage, frequency scaling at transistor and systems level.
• Solid knowledge of scripting and automation.

Responsibilities

• Understand, implement and verify performance (Vmin/Fmax) features on next-generation SoCs.
• Identify and root cause issues in digital and SoC architecture design; drive changes to design.
• Develop and improvise tuning methodologies and automation for volume performance correlation/analysis.

Skills

Systems validation and silicon debug

Digital integrated circuits & SoC design understanding

Python and related scripting languages

Education

Bachelor's in Computer Engineering and/or Electrical Engineering

Master's in Computer Engineering and/or Electrical Engineering

Tools

Debugging tools (JTAG, USB)

Scripting tools

Job description

Overview

The team is currently seeking a candidate for the position of SOC/Emulation Parametric Validation Engineer. In this role candidate will work with a local and global team to understand, implement and verify the performance (Vmin/Fmax) features on next-generation SoCs. Candidate needs a very good digital and SoC architecture design knowledge to identify and root cause issues and drive changes to design. Additionally, Candidate will be proactively involved in developing and improvising tuning methodologies and automation for volume performance correlation/analysis.

Responsibilities

• Understand, implement and verify performance (Vmin/Fmax) features on next-generation SoCs.
• Identify and root cause issues in digital and SoC architecture design; drive changes to design.
• Develop and improvise tuning methodologies and automation for volume performance correlation/analysis.

Required Skills

• Systems validation and silicon debug
• Digital integrated circuits & SoC design understanding
• Python and related scripting languages

Technologies

• Strong understanding of SoC/CPU architectures (ARM or x86)
• Familiarity with voltage, frequency scaling at transistor and systems level
• Experience with debugging silicon/design issues including JTAG, USB, etc.
• Solid knowledge of scripting and automation
• Familiarity with static timing analysis and device/transistor physics is a plus

Education

• Required: Bachelor\'s, Computer Engineering and/or Electrical Engineering
• Preferred: Master\'s, Computer Engineering and/or Electrical Engineering

Physical & Driving

• Physical Requirements: None
• Driving Requirements: Are their driving responsibilities no matter how minimal with this role? No
• If yes, how many hours of driving per week? None

Work Location & Schedule

• Work Location: Hybrid (working from home and in office)
• Shift: 40 hours/week