End-to-End AI Compute Architect — High-Performance Stack

Oxmiq Labs; Campbell (CA); On-site; USD 230,000 - 360,000; Full time

Job summary

Oxmiq Labs in California seeks a Full-Stack AI Compute Architect to define the software stack—from model ingestion and graph capture through compiler, runtime, and kernels—driving high-performance, CUDA-compatible solutions.

You will own end-to-end performance, guide MLIR/LLVM strategies, and collaborate with silicon teams to scale workloads for inference at real customer scale. This role requires fluency across ML frameworks and deep hardware knowledge.

Qualifications

• 12+ years building systems and/or AI-infrastructure software, owning architecture across multiple layers.
• Breadth across the AI software stack from model to kernel and instruction level.
• Hands-on experience with ML frameworks (PyTorch, JAX, ONNX) and models.
• Strong expertise in C++ and compiler infra (LLVM/MLIR).
• Deep expertise in SIMT and parallel compute architectures, including CUDA.

Responsibilities

• Refine the technical direction of OxPython and the software stack from front-ends to kernels.
• Own how AI models map onto the platform and ensure scalable, efficient inference.
• Drive end-to-end performance, remove bottlenecks across layers, close gaps to peak hardware utilization.
• Guide graph and compiler strategy: MLIR dialects, IR design, LLVM back-end codegen.
• Architect work orchestration across OxCore’s scalar, tensor, and SIMT engines, maintaining day-zero support.
• Advance SIMT execution and memory hierarchy, improve thread/warp scheduling and occupancy.
• Refine kernel programming models, kernel fusion, tiling with kernel engineers.
• Design for scale and production, iterate with hardware teams, co-verify stack and silicon.

Skills

C++

LLVM/MLIR

SIMT architectures

CUDA

Compiler design

Education

BS/MS/PhD in CS/CE/EE

Tools

PyTorch

ONNX

Triton

Job description

Oxmiq Labs in California seeks a Full-Stack AI Compute Architect to define the software stack—from model ingestion and graph capture through compiler, runtime, and kernels—driving high-performance, CUDA-compatible solutions.

You will own end-to-end performance, guide MLIR/LLVM strategies, and collaborate with silicon teams to scale workloads for inference at real customer scale. This role requires fluency across ML frameworks and deep hardware knowledge.