Emulation Front-End Infra Engineer | AI-Driven Flows

Nvidia Corporation in; Santa Clara (CA); On-site; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking an Emulation Front-End Infrastructure Engineer to join our team onsite in Santa Clara, CA. You will own and evolve front-end compilation and synthesis flows for hardware emulation, automate pipelines, and work closely with design teams and EDA vendors.

You will use Verilog/SystemVerilog, scripting languages, and industry tools to improve flow reliability, scalability, and observability across NVIDIA's development environment.

Qualifications

• BS in Electrical/Computer Engineering or related field with 5+ years of relevant experience.
• Experience with RTL compilation, synthesis, front-end design implementation, and flow automation.
• Proficient in Verilog and SystemVerilog; read/modify RTL for emulation.
• Hands-on with front-end synthesis and compilation EDA tools (Design Compiler, ZeBu, HDL-ICE).
• Strong scripting in Python, Perl, Tcl, shell, and Makefiles.
• Experience with distributed compute farms using schedulers like LSF or Slurm and with Perforce/Git.
• Strong debugging and cross-functional collaboration skills.

Responsibilities

• Own and evolve front-end compilation, synthesis, and flow infrastructure for NVIDIA hardware emulation platforms.
• Develop, maintain, and automate robust compilation and synthesis flows using scripting and industry-leading EDA tools.
• Run, analyze, and debug regular compilation and synthesis regressions; maintain RTL design stability with designers.
• Apply AI techniques to improve flow automation, triage compilation failures, and accelerate root-cause analysis.
• Evaluate, deploy, and support EDA tools and methodologies for front-end implementation and emulation compilation.
• Diagnose complex compilation, elaboration, synthesis, and implementation issues with internal design teams and EDA vendors.
• Improve flow performance, reliability, scalability, usability, and observability across a large-scale hardware development environment.

Skills

RTL compilation & synthesis

Front-end design implementation

Flow automation

Python scripting

Verilog / SystemVerilog

Workload scheduling (LSF/Slurm)

Revision control (Perforce/Git)

Communication & collaboration

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

Synopsys Design Compiler

ZeBu Compiler

Cadence HDL-ICE

Job description

NVIDIA is seeking an Emulation Front-End Infrastructure Engineer to join our team onsite in Santa Clara, CA. You will own and evolve front-end compilation and synthesis flows for hardware emulation, automate pipelines, and work closely with design teams and EDA vendors.

You will use Verilog/SystemVerilog, scripting languages, and industry tools to improve flow reliability, scalability, and observability across NVIDIA's development environment.