Emulation Front-End Infrastructure Engineer

NVIDIA; Santa Clara (CA); On-site; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA in Santa Clara, CA, seeks an Emulation Front-End Infrastructure Engineer to join the Emulation Infrastructure team onsite. You will own and evolve front-end compilation and synthesis flows for hardware emulation platforms, automate flows with scripting, and collaborate with RTL designers and EDA vendors.

You’ll implement robust regression runs, debug issues, and apply AI techniques to improve flow automation and root-cause analysis.

Qualifications

• BS or MS with 5+ years of relevant experience, or equivalent
• Experience with RTL compilation, synthesis, front-end design implementation, and flow automation
• Proficiency in Verilog/SystemVerilog for emulation needs
• Strong understanding of RTL elaboration, synthesis, and front-end methodologies
• Hands-on experience with front-end synthesis and EDA tools (Synopsys, ZeBu, Cadence)
• Excellent automation/scripting in Python, Perl, Tcl, shell, Makefiles
• Experience with workload schedulers (LSF/Slurm) and version control (Perforce/Git)
• Strong debugging and cross-functional collaboration skills

Responsibilities

• Own and evolve front-end compilation, synthesis, and flow infrastructure for NVIDIA hardware emulation platforms.
• Develop, maintain, and automate robust compilation and synthesis flows using scripting and industry-leading EDA tools.
• Run, analyze, and debug regular compilation and synthesis regressions; support RTL design stability with design teams.
• Apply AI techniques to improve flow automation and root-cause analysis.
• Evaluate, deploy, and support EDA tools and methodologies for front-end implementation.
• Diagnose complex compilation, elaboration, synthesis issues with internal teams and vendors.
• Improve flow performance, reliability, scalability, usability, and observability across a large-scale environment.

Skills

RTL compilation

Verilog/SystemVerilog

Scripting

Workflow automation

Distributed compute farms

Version control

Debugging

Cross-functional collaboration

Education

BS in Electrical/Computer Engineering or related

MS in related field (optional)

Tools

Synopsys Design Compiler

ZeBu Compiler

Cadence HDL-ICE

Job description

NVIDIA has been pioneering accelerated computing for more than two decades-from the invention of the GPU to breakthroughs in AI, high-performance computing, robotics, autonomous vehicles, and gaming. Our Emulation Infrastructure team builds scalable hardware development platforms and compilation flows that enable pre-silicon validation of NVIDIA's most complex designs.

We are now looking for a Emulation Front-End Infrastructure Engineer to join our team onsite in Santa Clara, CA.

What You’ll Be Doing

• Own and evolve front-end compilation, synthesis, and flow infrastructure for NVIDIA hardware emulation platforms.
• Develop, maintain, and automate robust compilation and synthesis flows using scripting and industry-leading EDA tools.
• Run, analyze, and debug regular compilation and synthesis regressions; help maintain RTL design stability in close partnership with logic designers.
• Explore and apply AI techniques to improve flow automation, triage compilation failures, identify recurring failure patterns, and accelerate root-cause analysis.
• Evaluate, deploy, and support EDA tools and methodologies for front-end implementation and emulation compilation.
• Diagnose complex compilation, elaboration, synthesis, and implementation issues, working closely with internal design teams and EDA vendors.
• Improve flow performance, reliability, scalability, usability, and observability across a large-scale hardware development environment.

What We Need To See

• A BS degree in Electrical Engineering, Computer Engineering, or a related field (or equivalent experience) with 5+ years of relevant experience; or an MS degree in a related field with 3+ years of relevant experience.
• Experience with RTL compilation, synthesis, front-end design implementation, and flow automation.
• Working proficiency in Verilog and SystemVerilog, including the ability to read, debug, and modify RTL for emulation needs.
• Strong understanding of RTL elaboration, synthesis, logic optimization, and front-end design methodologies.
• Hands-on experience with front-end synthesis and compilation EDA tools, including Synopsys Design Compiler, ZeBu Compiler, and Cadence HDL-ICE.
• Strong automation and scripting skills in Python, Perl, Tcl, shell scripting, and Makefile-based flows.
• Experience running high volumes of jobs on distributed compute farms using workload schedulers such as LSF or Slurm, and using revision-control systems such as Perforce or Git.
• Strong debugging, problem-solving, communication, and cross-functional collaboration skills.

Ways To Stand Out From The Crowd

• Experience with hardware-emulation compilation flows and runtime bring-up or debugging is a plus!
• Deep expertise with Synopsys Design Compiler, ZeBu Compiler, and Cadence HDL-ICE.
• Experience building scalable regression, reporting, monitoring, and flow-debug infrastructure.
• Experience building AI/LLM agents or automation that can classify tool logs, diagnose failures, and drive automated recovery.
• Experience partnering directly with EDA vendors to resolve complex tool, methodology, or performance issues.

NVIDIA is widely recognized as one of the technology industry's most desirable employers. Join NVIDIA's Emulation Infrastructure team to build scalable, reliable compilation flows that enable pre-silicon validation and accelerate innovation across AI, robotics, autonomous driving, gaming, and high-performance computing.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.