Embedded Systems Engineer — Gate-Level Verification (TS)

Mission Technologies, a division of HII; Roanoke (VA); On-site; USD 90,000 - 190,000; Full time

Benefits offered by this job

Medical/dental/vision plans

401(k) Savings plan

Paid holidays and PTO

Tuition reimbursement

Job summary

Mission Technologies, a division of HII, is seeking engineers to dissect complex digital systems, verify gate-level netlists, and uncover hidden behaviors through robust models and test benches.

The role requires experience in SystemVerilog/SystemC, C/C++, and full verification toolchains; top-secret clearance is preferred and citizenship is required. Salary spans multiple levels with comprehensive benefits. Woodbine Roanoke area preferred.

Qualifications

• Degree in Electrical, Computer Engineering, Computer Science, or related field.
• 2+ years experience for Level 2 with Bachelor; 9+ years for Level 4 with Bachelor, etc.
• Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab.
• Directed, constrained-random, and assertion-based verification techniques.
• Experience with commercial digital simulators (Xcelium, Incisive, Questa, VCS, Riviera-Pro).
• Scripting for batch tasks: Python, Bash, Tcl, make.
• Version control: Perforce, git, SVN.
• Familiarity with gate-level netlists debugging.

Responsibilities

• Develop models, transactors, stimuli, monitors, and test benches for simulating and uncovering hidden behaviors.
• Produce clear documentation and test cases to demonstrate bugs or deviations from spec.
• Collaborate with teammates to deliver cohesive results and improve processes.

Skills

SystemVerilog

SystemC

C/C++

Matlab

Python

Bash

Tcl

Perforce

Git

SVN

gate-level verification

debugging netlists

Education

Electrical Engineering

Computer Engineering

Computer Science

Tools

Xcelium

Incisive

Questa

VCS

Riviera-Pro

OneSpin 360-EC

Job description

Mission Technologies, a division of HII, is seeking engineers to dissect complex digital systems, verify gate-level netlists, and uncover hidden behaviors through robust models and test benches.

The role requires experience in SystemVerilog/SystemC, C/C++, and full verification toolchains; top-secret clearance is preferred and citizenship is required. Salary spans multiple levels with comprehensive benefits. Woodbine Roanoke area preferred.