Embedded Hardware Engineer – RF/Analog & OpenVPX

Georgia Tech Research Institute; Atlanta, Northern (GA, KY); Hybrid; USD 95,000 - 130,000; Full time

Job summary

Georgia Tech Research Institute (GTRI) seeks an experienced hardware engineer to develop mixed-signal solutions for EW, radar, avionics and communications systems. You will design RF/analog and digital hardware, perform simulations, and bring-up test hardware in collaboration with cross-functional teams.

Expect extensive lab work, documentation, and mentoring. Active Secret Clearance is preferred; relocation and full-time employment offered through the AES division of ELSYS at GTRI.

Qualifications

• Experience with open architectures and standards such as OpenVPX, SOSA, HOST, OMS/UCI, Big Iron, AMS GRA, UC2, NIEM, OCI.
• Embedded hardware development including FPGA designs and analog/digital circuits.
• Knowledge of Ethernet and PCI Express and related embedded hardware standards.
• Familiarity with MBSE and SysML for systems engineering.

Responsibilities

• Perform circuit simulation, schematic capture, and board layout for submodules of a platform design.
• Generate documentation of hardware design and theory of operation.
• Perform lab testing activities and validate hardware performance.
• Integrate modules with other system components and ensure compatibility.
• Contribute to technical reports and presentations and mentor others.
• Lead efforts in open architectures development and sponsor communications.

Skills

OpenVPX SOSA HOST OMS/UCI

Embedded hardware development

FPGA design tools

Analog/digital circuit design

MBSE SysML

Ethernet PCI Express knowledge

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

PhD in Electrical/Computer Engineering

Tools

FPGA design tools

Schematic capture tools

Job description

Georgia Tech Research Institute (GTRI) seeks an experienced hardware engineer to develop mixed-signal solutions for EW, radar, avionics and communications systems. You will design RF/analog and digital hardware, perform simulations, and bring-up test hardware in collaboration with cross-functional teams.

Expect extensive lab work, documentation, and mentoring. Active Secret Clearance is preferred; relocation and full-time employment offered through the AES division of ELSYS at GTRI.