Elite FPGA Engineer: VHDL, RF & System Integration

Quest Defense Systems & Solutions, Inc.; Tucson (AZ); On-site; USD 84,000 - 96,000; Full time

Job summary

Quest Defense Systems and Solutions is seeking an experienced FPGA Engineer to design and verify FPGA designs across major vendors such as Xilinx, Altera, and Microsemi, using VHDL. The role collaborates with circuit card designers and systems engineers to deliver production-quality FPGA releases.

Responsibilities include translating system requirements into FPGA specifications, performing synthesis, place-and-route, and developing robust verification strategies with constrained-random tests.

Qualifications

• 2-8 years of engineering experience in digital design and FPGA.
• Experience with Xilinx or Microsemi devices and tooling.
• Strong VHDL and verification background.

Responsibilities

• Design and deliver production-quality FPGA releases from initial proof of concept through production.
• Architect FPGA-based systems, including selection of devices, interfaces, and CONOPS.
• Translate system-level requirements into detailed FPGA requirements.
• Develop and verify FPGA designs with consideration for maintenance and reuse.
• Perform FPGA simulation, synthesis, implementation, and place-and-route activities.
• Develop and execute directed and constrained-random verification tests.
• Provide engineering support throughout full product lifecycle, from requirements to integration and test.

Skills

Digital design

VHDL coding

FPGA development

Debugging

Education

Bachelor's degree in Electrical Engineering

Tools

Xilinx FPGA tools

Microsemi devices

Verilog/SystemVerilog

VHDL simulators

Job description

Quest Defense Systems and Solutions is seeking an experienced FPGA Engineer to design and verify FPGA designs across major vendors such as Xilinx, Altera, and Microsemi, using VHDL. The role collaborates with circuit card designers and systems engineers to deliver production-quality FPGA releases.

Responsibilities include translating system requirements into FPGA specifications, performing synthesis, place-and-route, and developing robust verification strategies with constrained-random tests.