DRAM Memory Design Engineer - Principal | MTS | SMTS

1000 Micron Technology, Inc.

Boise (ID)

On-site

USD 170,000 - 210,000

Full time

11 days ago

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Medical, Dental, Vision
Paid time off
Relocation assistance

Job summary

Micron Technology, Inc. in Boise, ID is seeking a Semiconductor Design Engineer (Principal / MTSS / SMT) to design and optimize next-generation DRAM products.

You will collaborate with global teams to balance performance, power, reliability, and cost, while mentoring engineers. Responsibilities include leading circuit development, floor-planning, and silicon validation, with opportunities to influence technical direction and AI-assisted design flows.

Qualifications

  • Bachelor's in Electrical Engineering or related field with senior-level semiconductor design experience.
  • 10+ years with MSEE or 12+ years with BSEE in DRAM/semiconductor design and leadership.
  • Proficient in Verilog modeling, PDN analysis, and circuit verification methodologies.

Responsibilities

  • Design and optimize digital and analog circuits for next-gen DRAM products.
  • Lead circuit development, simulation, verification, and silicon validation.
  • Drive floor-planning, layout optimization, and tape-out activities.
  • Advance AI-assisted design through collaboration with partners.
  • Provide technical leadership and mentorship to engineers.

Skills

CMOS design
Device physics
State machine logic
Design verification
Verilog modeling
PDN analysis
Python scripting
Tcl scripting
Perl scripting
Analytical thinking
Communication
Collaboration

Education

Bachelor's degree in Electrical Engineering or related field
MSEE
BSEE with 12+ years experience
SMTS level with 15+ years experience

Tools

Verilog tools
Schematic tools
HSPICE
FINESIM

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are shaping the memory technologies that power today's most advanced computing platforms, from AI accelerators to mobile and client devices. Our DRAM Engineering team brings together skilled engineers across the globe to solve complex technical challenges, drive innovation, and deliver high-performance memory solutions. If you enjoy tackling difficult problems and turning ideas into products, you'll find exciting opportunities to make an impact here.

As a Semiconductor Design Engineer (Principal / Member of Technical Staff / Senior Member of Technical Staff), you will play a key role in designing and optimizing next-generation DRAM products. You will work closely with global design, verification, and multi-functional teams to develop innovative circuit solutions that balance performance, power, quality, reliability, and cost. This role also offers the opportunity to influence technical direction, mentor engineers, and help advance future memory technologies.

Responsibilities
  • Design and optimize digital and analog circuits for next-generation DRAM products, including memory arrays, control logic, datapaths, address decoding, and I/O circuitry.
  • Lead circuit development, simulation, verification, and silicon validation to achieve performance, power, area, and quality targets.
  • Drive floor-planning, layout optimization, parasitic analysis, and tape-out activities.
  • Advance AI-assisted design, automation, and design-space exploration through collaboration with internal and external partners.
  • Provide technical leadership through innovation, multi-functional collaboration, and mentorship of other engineers.
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering or related field, plus MSEE with 10+ years, BSEE with 12+ years, or equivalent relevant semiconductor design experience; SMTS candidates typically have 15+ years of experience with demonstrated technical leadership.
  • Extensive knowledge of CMOS circuit design, device physics, state machine logic, and design verification methodologies.
  • Experience with Verilog modeling, simulation tools, and power delivery network (PDN) analysis.
  • Proficiency in scripting languages such as Python, Tcl, or Perl.
  • Strong analytical, problem-solving, communication, and multi-functional collaboration skills.
Preferred Qualifications
  • Master's degree or PhD in Electrical Engineering or a related field.
  • Experience with DDR5, LPDDR5/LPDDR6, GDDR6/7, or HBM3/HBM4 memory technologies.
  • Experience with FINESIM, HSPICE, or similar schematic entry and simulation tools.
  • Experience leading complex circuit design projects and mentoring engineers.
  • Exposure to AI/ML-assisted design flows, agentic AI, or advanced design automation frameworks.
Work location

Boise, ID, Main Site. Schedule is 5 days onsite. Relocation support may be available.

Benefits

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.

  • We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
  • Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury.
  • Paid family leave.
  • Robust paid time-off program and paid holidays.

For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Equal Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

DRAM Memory Design Engineer - Principal | MTS | SMTS
DRAM Memory Design Engineer - Principal | MTS | SMTS

Micron Technology, Inc • Boise (ID)

On-site
USD 180,000 - 260,000
Relocation assistance
Medical, dental, vision plans
Paid time off
+1
DRAM Memory Design Engineer - Principal | MTS | SMTS
DRAM Memory Design Engineer - Principal | MTS | SMTS

Micron Technology • Boise (ID)

On-site
USD 150,000 - 230,000
Relocation assistance
Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal
Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal

1000 Micron Technology, Inc. • Boise (ID)

On-site
USD 120,000 - 160,000
Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal
Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal

Micron Technology • Boise (ID)

On-site
USD 110,000 - 170,000
Relocation support
DRAM Memory Design Engineer - Principal | MTS | SMTS Boise, Idaho, United States of America Pos[...]
DRAM Memory Design Engineer - Principal | MTS | SMTS Boise, Idaho, United States of America Pos[...]

Micron Technology, Inc • Boise (ID)

Hybrid
USD 180,000 - 240,000
Relocation assistance
Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal
Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal

Micron Technology, Inc • Boise (ID)

On-site
USD 120,000 - 190,000
Relocation support may be available
Medical, dental and vision plans
Paid time off and holidays
Principal, MTS, DRAM Systems Architect
Principal, MTS, DRAM Systems Architect

Micron Technology, Inc • Boise (ID)

On-site
USD 190,000 - 230,000
Medical, dental and vision plans
Paid time off
Paid holidays
Principal, MTS, DRAM Systems Architect
Principal, MTS, DRAM Systems Architect

Micron • Boise (ID)

On-site
USD 150,000 - 190,000
Medical, dental and vision plans
Robust paid time-off program
Paid holidays
Staff DRAM Design Engineer
Staff DRAM Design Engineer

Micron Technology • Boise (ID)

On-site
USD 100,000 - 120,000
Medical, dental, and vision plans
Paid time-off program
Paid holidays
Principal Memory Design Engineer, HBM
Principal Memory Design Engineer, HBM

Micron Technology, Inc • Richardson (TX)

On-site
USD 120,000 - 150,000
Robust paid time-off program
Paid family leave
Income protection programs