Display Product Failure Analysis Engineer, Raxium

Google; Fremont (CA); On-site; USD 147,000 - 216,000; Full time

Job summary

Join a forward-thinking company as a Display Product Failure Analysis Engineer, where you will utilize your expertise to drive innovation in display technology. This role involves executing failure analysis on microLED components and collaborating with cross-functional teams to enhance product designs and quality. You'll be at the forefront of developing cutting-edge solutions that bridge the digital and physical worlds, contributing to products that are beloved by millions. If you're passionate about technology and eager to make a significant impact in the industry, this opportunity is perfect for you.

Benefits

Bonus

Equity

Comprehensive benefits package

Qualifications

• 4+ years in a CMOS environment or 3+ years with an advanced degree.
• Experience with display technology and failure analysis techniques.

Responsibilities

• Perform failure analysis on display components and circuits.
• Identify root causes of failures and improve product designs.
• Collaborate with teams to enhance product quality.

Skills

CMOS technical environment experience

Display backplane debugging

Statistical data analysis

Script coding (Python, Matlab, C++)

Failure analysis techniques

Understanding of CMOS technology

Education

Bachelor’s degree in Electrical Engineering

Bachelor’s degree in Computer Engineering

Bachelor’s degree in Computer Science

Bachelor’s degree in Physics

Tools

JMP

SEM

FIB

EDX

X-ray

CT

CSAM

Job description

Minimum qualifications:

1. Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., Optics, Sensors, Audio/DSP, etc.), or equivalent practical experience.
2. 4 years of experience working in a CMOS technical environment, or 3 years of experience with an advanced degree.

Preferred qualifications:

1. Experience with display backplane and control application debugging, such as FA on TFT-LCD displays or OLED panels, and knowledge of microLED technology and displays, their characterization, failure modes and failure causes.
2. Experience with statistical data analysis (using JMP or other tools), and experience with script coding (e.g. Python, Matlab, C++, etc) for testing and data analysis.
3. Experience in various failure analysis techniques including SEM, FIB, EDX, x-ray, CT, CSAM, electrical characterization, and cross-sectioning.
4. Understanding of CMOS technology, circuit design, semiconductor manufacturing processes, and printed circuit boards.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Display Product Failure Analysis (FA) Engineer, you will be responsible for performing failure analysis to identify root causes for failures in microLED display components, circuits, sub-assemblies, and products. You will be using a combination of circuit diagnostics, fault isolation techniques, and material characterization methods to understand the failure mechanisms and identify the root cause of failures in microLED backplanes, drivers, and displays. You will report and share your findings, and collaborate with other teams to improve the product designs and yields.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

The US base salary range for this full-time position is $147,000-$216,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google (https://careers.google.com/benefits/).

Responsibilities:

1. Execute failure analysis on electronic display components, circuits, sub-assemblies, and products.
2. Identify and isolate mechanisms and root causes for failures, to improve product designs and screens.
3. Document failure methods and publish reports in the product quality system.
4. Provide recommendations for corrective actions to prevent future display failures.
5. Collaborate with FA operations team to execute material characterizations, with CMOS and Control teams to improve the designs, with Test team to improve the panel characterization and yield screens.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf. If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.