Digital IC Design Engineer Intern — Build Real Hardware

Texas Instruments Incorporated

Santa Clara (CA)

On-site

USD 55,000 - 69,000

Full time

4 days ago
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Job summary

Texas Instruments Incorporated in Santa Clara, CA, is seeking a Digital IC Design Engineering intern to architect TI products and document analog, digital, and RF ICs. You will participate in design reviews, help with layouts, and contribute to prototypes and test specs.

The role offers exposure to audio, imaging, high-speed interfaces and power management in a collaborative team environment; candidates must be pursuing EE or related field with a minimum 3.0/4.0 GPA.

Qualifications

  • Currently pursuing a Bachelor's degree in Electrical Engineering, Electronics Technology, Computer Engineering, Electrical Engineering Technology, Electrical and Computer Engineering or related field
  • Cumulative 3.0/4.0 GPA or higher

Responsibilities

  • Partner with business teams and system engineering to develop mutually agreeable design specifications
  • Providing high-level analysis on chip architecture trade-offs to ensure spec compliance and superior performance at a competitive cost
  • Participating in design reviews and creating the necessary design and product documentation
  • Partnering on IC layouts to ensure a high-performance standard
  • Characterizing prototypes, developing test specifications and coordinating with test/product engineering to drive product releases
  • Driving behavioral models

Skills

Team collaboration
Analytical skills
Problem-solving
Communication skills

Education

Bachelor's degree in Electrical Engineering or related field

Job description

Texas Instruments Incorporated in Santa Clara, CA, is seeking a Digital IC Design Engineering intern to architect TI products and document analog, digital, and RF ICs. You will participate in design reviews, help with layouts, and contribute to prototypes and test specs.

The role offers exposure to audio, imaging, high-speed interfaces and power management in a collaborative team environment; candidates must be pursuing EE or related field with a minimum 3.0/4.0 GPA.

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