Digital IC Design Engineer | Custom

Texas Instruments; Dallas (TX); On-site; USD 110,000 - 170,000; Full time

Job summary

Texas Instruments in Dallas is seeking a Digital Design Engineer to design complex digital and mixed-signal blocks for advanced ASSP ICs. You will drive RTL development, set timing constraints, and ensure high-quality netlists for P&R while coordinating with the Analog team on chip-level digital requirements.

The role emphasizes hands-on RTL verification, formal checks with JasperGold, design reviews, and proactive risk mitigation to meet schedules with first-pass success.

Qualifications

• Develop system specifications from a digital and mixed-signal perspective.
• Create micro-architecture documentation from the spec.
• Lead RTL development and verification (RTL and gate-level).
• Create timing constraints and perform logic synthesis.
• Implement checks to produce high-quality netlists for place&route.
• Run STA and assess timing quality.
• Execute CDC/RDC checks.
• Conduct JasperGold auto-formal verification checks.
• Lead design and verification reviews.
• Collaborate with Analog team on chip-level digital requirements.
• Proactively assess risk and drive mitigation.
• Interface with customers to refine requirements.
• Mentor team members to grow digital design skills.
• Drive RTL design and verification flow improvements.
• Take initiative to ensure on-time first-pass success.

Responsibilities

• Own the RTL design and verification flow for digital cores.
• Collaborate with analog and system teams to align on chip requirements.
• Mentor junior designers and contribute to design reviews.

Skills

RTL design

Digital design

Mixed-signal awareness

Mentoring

Tools

JasperGold

STA timing analysis

Job description

The TI Custom BU is seeking a talentedDigital Design Engineerwith experience indesigning complex mixed-signal devices. Come be a part of an exciting custom Digital Design Team in the ACS product line with responsibility for planning, architecting, and designing digital and mixed signal circuits for cutting-edge ASSP ICs for a marquee customer. We strive for continuous improvement in quality, efficiency, and schedule predictability using the latest design tools and methodologies. This role offers the opportunity to be a core member in a team driving flawless execution while finding innovative solutions to customers’ problems through “out of the box thinking” to deliver highly differentiated products. This individual will:

• Assist systems team in developing the system spec for the device from a digital and mixed signal point of view.
• Develop micro architecture documentation from the spec.
• Drive RTL development and verification (RTL and Gate level)
• Develop timing constraints and execute logic synthesis.
• Implement checks to develop high quality netlist for P&R.
• Run STA and review design quality from timing point of view.
• Execute Clock/Reset Domain Crossing Checks (CDC/RDC)
• Execute JasperGold auto-formal verification checks
• Drive reviews for design and verification.
• Interact with Analog team to drive chip level requirements for the digital cores.
• Be proactive in risk assessment and drive solutions to mitigate them.
• Interact with customers on requirements and refine them.
• Take an active role in mentoring team members and developing the digital design skill set in the team.
• Drive RTL design and verification flow improvement strategies.
• Must take the initiative to drive on-time first-pass success methodologies.