Digital Design Engineer Intern: FPGA & Verilog Prototyping

Analog Devices; San Jose (CA); On-site; USD 26,000 - 48,000; Full time

Job summary

Analog Devices is offering a Digital Design Engineer Intern role in San Jose. You will gain hands-on experience in design, simulation, and verification of digital ICs, working with experienced engineers on FPGA prototyping and timing analysis.

Ideal candidates are pursuing a Bachelor's or Master's in Electrical or Computer Engineering, with coursework in digital design and strong problem-solving skills. This internship provides growth toward full-time opportunities and collaboration across teams.

Qualifications

• Proficient in Verilog or VHDL for digital circuit design and simulation.
• Experience or coursework in RTL design and verification.
• Ability to model digital circuits and verify functionality.

Responsibilities

• Assist in design and simulation of digital circuits using Verilog or VHDL.
• Support RTL design and verification for digital modules.
• Use digital models to verify circuit performance.
• Participate in FPGA prototyping and testing for design validation.
• Collaborate with senior engineers to resolve design issues.
• Contribute to timing analysis and verification processes.
• Document design work and test results per team standards.

Skills

Verilog/VHDL

RTL design

Digital modeling

FPGA prototyping

Timing analysis

Documentation

Education

Bachelors/Masters in Electrical Engineering or Computer Engineering

Job description

Analog Devices is offering a Digital Design Engineer Intern role in San Jose. You will gain hands-on experience in design, simulation, and verification of digital ICs, working with experienced engineers on FPGA prototyping and timing analysis.

Ideal candidates are pursuing a Bachelor's or Master's in Electrical or Computer Engineering, with coursework in digital design and strong problem-solving skills. This internship provides growth toward full-time opportunities and collaboration across teams.