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L&T Technology Services in California is seeking an experienced DFT/ATPG engineer to contribute to advanced SoC/ASIC verification. This role emphasizes hands-on pattern generation, analysis, and debug across complex semiconductor programs.
The ideal candidate has 5+ years in DFT/ATPG, strong knowledge of MBIST, IO validation, and clock DFT, with a solid background in RTL and digital design. Excellent problem-solving and communication skills are essential.
The expected salary range for this position is between $90K - $190K annually. The actual salary may vary based upon several factors including, but not limited to, relevant skills/experience, time in role, base salary of internal peers, prior performance, business line, and geographic/office location.