DFT (Design For Test) Lead (6251)

itD Tech; Arizona; Hybrid; USD 150,000 - 230,000; Full time

Benefits offered by this job

Medical benefits

401K + matching

Paid holidays

Career learning & development

Job summary

itD Tech is seeking a Design-for-Test (DFT) Lead to drive advanced DFT solutions across the silicon development lifecycle, ensuring testable, manufacturable ASIC designs. The role requires deep DFT expertise, post-silicon validation, and leadership to resolve complex challenges.

The position offers hybrid work options in Carlsbad, CA or Allentown, PA or US remote, with Pacific Time hours. A 14-month duration and comprehensive benefits are included; sponsorship is not available.

Qualifications

• Bachelor's or Master's degree in Electrical or Computer Engineering or a related field.
• 8–10+ years of ASIC DFT engineering experience.
• Hands-on experience with JTAG, scan architectures, MBIST, BISR, boundary scan and IP integration.
• Experience with ATPG methodologies and EDA tools (Tessent, Xcelium, Genus, Tempus/PrimeTime).
• Experience with post-silicon debug of DFT patterns and production release.

Responsibilities

• Lead hardware DFT feature implementation (scan, MBIST, BISR, boundary scan, DFT sim setup).
• Develop DFT IP with cross-functional teams and integrate into full-chip RTL designs.
• Perform post-silicon debug, root-cause analysis and production qualification to improve yield and manufacturability.
• Collaborate with physical design, validation, and hardware teams throughout the silicon lifecycle.
• Design, validate and release ATPG patterns for manufacturing test readiness and ramp.

Skills

DFT engineering

JTAG/scan architectures

MBIST/BISR

ATPG methodologies

post-silicon debugging

ASIC design & test

strong problem-solving

Education

Bachelor's or Master's in EE/CE

Tools

Tessent

Xcelium

Genus

Tempus

PrimeTime

Job description

itD is seeking a DFT (Design For Test) Lead to drive the implementation and integration of advanced Design-for-Test (DFT) solutions across the silicon development lifecycle, ensuring highly testable, manufacturable, and reliable ASIC designs. The ideal candidate will bring deep expertise in ASIC DFT methodologies, post-silicon validation, and test architecture development, with a proven track record of delivering production-ready silicon through cross‑functional collaboration.

Location: Hybrid in Carlsbad, CA or Allentown, PA, or U.S. Remote.

Candidates must be available to work Pacific Time business hours (9:00 AM–5:00 PM PST).

Duration: 14 months

We provide comprehensive medical benefits, a 401k plan, paid holidays, and more. Please note that we are only considering direct W2 candidates at this time, as we are unable to offer sponsorship.

Responsibilities:

• Lead the implementation of hardware Design-for-Test (DFT) features, including scan, memory BIST (MBIST), BISR, boundary scan, and DFT simulation setup and debugging.
• Develop innovative DFT IP in collaboration with cross‑functional engineering teams and integrate testability features into full‑chip RTL designs.
• Perform post‑silicon debugging, root cause analysis, and production qualification activities to improve silicon yield, reliability, and manufacturability.
• Collaborate with physical design, validation, and hardware engineering teams throughout the complete silicon product lifecycle.
• Design, validate, and release ATPG patterns while supporting manufacturing test readiness and production ramp.
• Develop technical solutions and resolve complex DFT challenges with minimal supervision while providing technical leadership to the broader engineering team.

Internal Responsibilities:

• Attend regular internal practice community meetings.
• Collaborate with your itD practice team on industry thought leadership.
• Complete client case studies and learning material (blogs, media material).
• Build out material to contribute to the Digital Transformation practice.
• Attend internal itD networking events (in person and virtual).
• Work with leadership on career fast‑track opportunities.

Required Qualifications and Skills:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 8–10+ years of ASIC Design-for-Test (DFT) engineering experience.
• Hands‑on experience implementing JTAG protocols, scan architectures, memory BIST (MBIST), BISR, boundary scan, and integration of third‑party IP and high‑speed digital/analog macros.
• Experience with ATPG methodologies and industry‑standard EDA tools, including Tessent, Xcelium, Genus, and Tempus or PrimeTime.
• Hands‑on experience with at least one full project involving post‑silicon debug of DFT patterns, including scan, MBIST, boundary scan, and production release.
• Strong understanding of ASIC design, silicon validation, and test methodologies.
• Demonstrated ability to independently develop technical solutions and troubleshoot complex DFT issues.

Preferred Qualifications and Skills:

• Experience developing and standardizing DFT methodologies from design through high‑volume manufacturing.
• Ability to mentor and train engineering teams on DFT best practices.
• Strong communication and presentation skills.
• Excellent analytical and problem‑solving abilities with strong attention to detail.
• System‑level understanding of networking and photonic solutions.
• Ability to quickly learn new technologies and adapt within a fast‑paced engineering environment.

Education:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field required. Master's degree preferred.

Company Description
About itD: We are part of a new generation of consulting and software development company that blends diversity, innovation, and integrity with real business results. Our structure rejects any strong hierarchy, empowering us to deliver excellent results. We are a woman‑ and minority‑led firm. Every day, we challenge ourselves to be considerate, fair and to re‑think what great outcomes mean for our customers. This permeates down to how we approach every interaction, on every project, for every client. You’ll thrive here if you are a dynamic self‑starter, a difference‑maker or someone who wants to deliver great results, without constraints.

The itD Digital Experience: Joining us means you’ll be part of our global community, you have a say about your own career journey, and you’ll get a chance to give back to causes that matter. You will experience working with Fortune 500 companies and high‑performance teams across numerous industries. itD offers our employees excellent benefits such as medical, dental, vision, life insurance, paid holidays, 401K + matching, networking & career learning and development programs. We are growing and we want to see you grow!

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or protected veteran status, or any other legally protected basis, in accordance with applicable law. itD is committed to working with and providing reasonable accommodation to individuals with disabilities. If, because of a medical condition or disability, you need a reasonable accommodation for any part of the application process, or to perform the essential functions of a position, please contact us at [e-mail] and let us know the nature of your request and your contact information.