DevOps Engineer – Semiconductor EDA Tools & Automation

Texas Instruments

Dallas (TX)

On-site

USD 90,000 - 120,000

Full time

14 days+

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Job summary

Texas Instruments in Dallas, Texas is seeking a DevOps Engineer to streamline semiconductor design and manufacturing processes. The role involves automating workflows for EDA applications using tools like Cadence PSPICE and ensuring compliance in hybrid cloud environments.

You will design and manage high-performance infrastructures, develop automated solutions, and collaborate across engineering and IT teams to optimize DevOps pipelines for efficient operations. Join us to make a significant impact in semiconductor innovation.

Qualifications

  • Experience with DevOps practices and tools in a cloud/hybrid environment.
  • Strong understanding of EDA tools, specifically Cadence PSPICE.
  • Proficiency in automation and infrastructure-as-code solutions.

Responsibilities

  • Design, automate, and manage DevOps pipelines for semiconductor EDA tools.
  • Build and maintain scalable infrastructure for design workloads.
  • Optimize compute resources for global R&D teams.

Job description

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Mission

Empower TI to excel in semiconductor design and manufacturing by architecting, automating, and optimizing secure, high-performance environments for Electronic Design Automation (EDA) workloads. You will enable R&D and engineering teams to innovate faster by delivering scalable DevOps solutions that streamline the deployment and operation of EDA tools—including Cadence PSPICE, Artisan (TI internal EDA flow), PDKs (process development kits) and others—across cloud and hybrid infrastructure.

As a DevOps Engineer, you’ll be instrumental in building and automating workflows for compute-intensive EDA applications in a secure, compliant, and highly available environment. Your work will directly impact TI’s ability to deliver advanced semiconductor products to customers by ensuring seamless integration, operation, and optimization of industry-leading EDA toolchains.

You will:
  • Design, automate, and manage DevOps pipelines for deploying and operating semiconductor EDA tools (Cadence PSPICE, Artisan, etc.) on-prem and in the cloud.
  • Work closely with EDA tool vendors, TI EDA teams, and PDK teams while responding to customer inquiries.
  • Build and maintain scalable infrastructure for simulation, verification, and design workloads, leveraging LSF or Slurm job schedulers.
  • Develop and manage infrastructure-as-code solutions to automate provisioning, configuration, and scaling of EDA environments.
  • Collaborate with engineering, IT and security teams to ensure robust cybersecurity controls and compliance for sensitive design data.
  • Optimize compute, storage, and network resources to deliver fast, reliable access to EDA tools for global R&D teams.
  • Troubleshoot, monitor, and enhance performance of EDA workloads and DevOps pipelines, driving continuous improvement.
Core Responsibilities
  • Deploy, configure, and automate EDA tools (Cadence PSPICE, Artisan, etc.) in hybrid and cloud environments.
  • Design and manage high-performance, secure infrastructure for EDA workloads using LSF or Slurm job schedulers.
  • Implement and maintain CI/CD pipelines for EDA application updates, test automation, and environment provisioning.
  • Apply best practices for security, compliance, and operational reliability in semiconductor design environments.
  • Provide technical guidance to engineers and researchers on DevOps, automation, and EDA workload optimization.
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