Design Verification Engineer – Physical AI Compute

Velaura; Austin (TX); On-site; USD 75,000 - 275,000; Full time

Benefits offered by this job

Equity participation

Competitive benefits

Job summary

Velaura in Austin, Texas, seeks Design Verification Engineers to verify its next‑generation Physical AI SoC. You will work with architects, RTL, software and system teams to ensure correctness, performance and safety across the platform.

Responsibilities include developing verification strategies, building environments with SystemVerilog, UVM and C/C++, and driving bug investigation and root-cause analysis across HW/SW boundaries, including emulation and pre‑silicon software bring‑up.

Qualifications

• Experience verifying complex digital systems.
• Strong analytical and problem-solving skills.
• Strong understanding of computer architecture, microarchitecture, SoC architecture and digital design fundamentals.
• Experience with SystemVerilog, UVM, C/C++, assertions, coverage-driven verification, and related methodologies.
• Familiarity with formal verification techniques and tools.
• Understanding of memory systems, interconnect fabrics, caches, DMA engines, processors, or accelerator architectures.
• Experience debugging complex system-level issues.
• Ability to work effectively in a collaborative, multidisciplinary engineering environment.

Responsibilities

• Develop and execute verification strategies for key portions of the SoC.
• Build verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, emulation, and related methodologies.
• Collaborate with architects and RTL engineers to define verification plans, coverage goals, and correctness criteria.
• Verify compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and other critical SoC infrastructure.
• Perform HW/SW co-verification involving firmware, drivers, runtime software, and operating system interactions.
• Verify performance, latency, bandwidth, QoS, and real-time system behavior under representative workloads.
• Develop assertions, checkers, scoreboards, and automated verification infrastructure.
• Participate in emulation, FPGA prototyping, and pre-silicon software bring-up activities.
• Drive bug investigation, root-cause analysis, and debug across hardware and software boundaries.
• Post-silicon debug and root cause analysis.
• Leverage modern engineering tools, including AI-assisted verification workflows, to improve productivity, quality, and coverage.
• Contribute to a culture of technical excellence and continuous improvement.

Skills

SystemVerilog

UVM

C/C++

Digital design fundamentals

SoC architecture

Tools

Assertions

Formal verification

Emulation

Job description

Role Overview

We are looking for talented Design Verification Engineers to help verify and deliver Velaura’s next-generation Physical AI SoC. In this role, you will work closely witharchitects, RTL engineers, software engineers, and system teams to verify complexhardware blocks and system-level behavior across the entire platform.You will helpestablish confidence in the correctness, performance, reliability, and safety of thearchitecture—from individual RTL blocks to complete HW/SW systems runningreal-world workloads. We welcome engineers at all experience levels who enjoyunderstanding systems, finding corner cases, and solving challenging technicalproblems.

Responsibilities

• Develop and execute verification strategies for key portions of the Velaura SoC.
• Build verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, emulation, and related methodologies.
• Collaborate with architects and RTL engineers to define verification plans, coverage goals, and correctness criteria.
• Verify compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and other critical SoC infrastructure.
• Perform HW/SW co-verification involving firmware, drivers, runtime software, and operating system interactions.
• Verify performance, latency, bandwidth, QoS, and real-time system behavior under representative workloads.
• Develop assertions, checkers, scoreboards, and automated verification infrastructure.
• Participate in emulation, FPGA prototyping, and pre-silicon software bring-up activities.
• Drive bug investigation, root-cause analysis, and debug across hardware and software boundaries.
• Post-silicon debug and root cause analysis.
• Leverage modern engineering tools, including AI-assisted verification workflows, to improve productivity, quality, and coverage.
• Contribute to a culture of technical excellence and continuous improvement.

Required Qualifications

• Experience verifying complex digital systems.
• Strong analytical and problem-solving skills.
• Strong understanding of computer architecture, microarchitecture, SoC architecture and digital design fundamentals.
• Experience with SystemVerilog, UVM, C/C++, assertions, coverage-drivenverification, and related methodologies.
• Familiarity with formal verification techniques and tools.
• Understanding of memory systems, interconnect fabrics, caches, DMA engines,processors, or accelerator architectures.
• Experience debugging complex system-level issues.
• Ability to work effectively in a collaborative, multidisciplinary engineeringenvironment.

Preferred Qualifications

• Experience with one or more of the following standards: ISO 26262, IEC 61508, IEC 61511, ISO 13849
• Experience with AI, machine learning, or edge AI hardware.
• Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems.
• Experience verifying QoS, latency-sensitive, or real-time systems.
• Experience with HW/SW co-verification and system-level validation.
• Exposure to performance modeling, profiling, and workload characterization.
• Experience using modern AI tools and workflows to accelerate engineering productivity.
• Background in CPUs, GPUs, AI accelerators, networking and communications silicon, storage and data movement architectures, robotics and autonomous systems, automotive and ADAS platforms, aerospace and defense systems, real-time and safety-critical computing, or functional safety architectures andmethodologies.

$75,000 - $275,000 a year

Compensation & Benefits

At Velaura, we believe exceptional talent deserves exceptional rewards. Compensationfor this role includes a competitive base salary, performance-based incentives, andequity participation, allowing team members to share in the company’s long-termsuccess.

Your base pay will depend on your skills, qualifications, experience, and location.

In addition to compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team.

Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.

Why Velaura?

Velaura is building next-generation compute technology for cloud, edge, and PhysicalAI. Our solutions will enable robots, autonomous systems, drones, and other intelligentmachines to operate efficiently in the physical world.

This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms. If you enjoy solving difficult problems, working across disciplines, and helping shape thefuture of Physical AI, we would love to hear from you.

Equal Employment Opportunity and Accommodations

Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity.Qualified applicants will receive consideration for employment without regard to race,color, religion, national origin, gender, sexual orientation, gender identity, disability orprotected veteran status. We also take affirmative action to offer employment opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mentaldisabilities. Applicants who would like to contact us regarding the accessibility of ourwebsite or who need special assistance or a reasonable accommodation for any part ofthe application or hiring process may contact us at: [e-mail]. This contact information is for accommodation requests only. Evaluation of requests for reasonableaccommodation will be determined on a case-by-case basis.