Design Verification Engineer (Einfochips)

Arrow Enterprise Computing Solutions

San Jose (CA)

On-site

USD 140,000 - 190,000

Full time

3 days ago
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Benefits offered by this job

Medical, Dental, Vision Insurance
401k with Matching Contributions
Short-Term/Long-Term Disability
HSA/HRA Options
Paid Time Off
Tuition Reimbursement
Growth Opportunities

Job summary

eInfochips, an Arrow company, is seeking a Design Verification Engineer in San Jose, CA. The candidate should have 6+ years of experience with SystemVerilog HVL and C/C++, plus UVM and SVTB/UVM proficiency.

Responsibilities include test plan development, BFM/Driver/Monitor/Scoreboard creation, integration in test benches, stress testing, and coverage closure. Experience with C++ testbenches and scripting (Make/Perl/Python) is required; DSP knowledge is a plus.

Qualifications

  • 6+ years of experience in SystemVerilog HVL and C/C

Responsibilities

  • Develop test plans and BVF/Driver/Monitor/Scoreboard components
  • Build and integrate verification components in testbench
  • Perform stress and corner testing, debug failures and achieve coverage closure
  • Proficient in SVTB/UVM and C++ testbench
  • Support verification closure with team

Skills

SystemVerilog HVL
C/C++
UVM
C++ testbench
Scripting (Make/Perl/Python)
Debug/assertions
Testbench integration

Tools

Subversion
Bugzilla

Job description

Position

Design Verification Engineer (Einfochips)

Job Description

Experience: 6+ Years

Location: San Jose CA

What candidate will Be Doing
  • At-least 6+ years of experience in System Verilog HVL and C++/C
  • At-least 6+ year of experience in UVM.
  • Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.
  • Proficient in SVTB/UVM, C++ testbench
  • Understand DSP is a plus
  • Subversion for Repository and Bugzilla is also a Plus
  • Proficient in debug and assertions coding
  • Verification closure with team
What We Are Looking For
  • At-least 6 + years of experience in System Verilog HVL and C++/C
  • At-least 6+ year of experience in UVM.
  • Make/Perl/Python / any script
  • Any protocol experiace is fine
  • Ensure customer satisfaction.
  • Reporting to customer on daily or weekly progress effectively
What's In It for You
  • At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That's why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
  • Medical, Dental, Vision Insurance
  • 401k, With Matching Contributions
  • Short-Term/Long-Term Disability Insurance
  • Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
  • Paid Time Off
  • Tuition Reimbursement
  • Growth Opportunities
  • And more!

Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location: San Jose CA.

About eInfochips

eInfochips, an Arrow company (Fortune #109), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's $33B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries C verticals.

EEO Statement

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.

Location

US-CA-San Jose, California (Cisco)

Time Type

Full time

Job Category

Engineering Services

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