Design Engineer

AccelerComm Ltd

West (TX)

Hybrid

USD 110,000 - 165,000

Full time

14 days+
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Benefits offered by this job

Bonus up to 20% of salary
Stock options
401K
Health/dental/optical insurance
Hybrid working

Job summary

AccelerComm Ltd. is seeking Design Engineers to work on cutting-edge wireless technology projects, developing IP, system and board solutions for 5G. The role emphasizes hands-on RTL design, verification, and collaboration with an elite team across a growing product portfolio.

We require 4+ years of relevant experience, with SystemVerilog, EDA tools, AXI interfacing and strong C/C++/Matlab prototyping skills. Hybrid work and competitive compensation offered in the United States.

Qualifications

  • Degree qualified (or equivalent).
  • 4+ years of experience in relevant field.
  • Proficiency with EDA tools for simulation and synthesis (ModelSim, Quartus, Vivado, DC, Genus).
  • AXI interfacing.
  • Timing and hardware resource optimisation for high throughput data or signal processing applications.
  • C/C++/Matlab prototyping for design and verification.
  • Version control and peer review (Git).
  • Documentation (Confluence).
  • Time management (Jira).
  • Desirable: maintenance of EDA tools; documenting innovations (publications/patents); automation (Jenkins); knowledge of communications signal processing algorithms; mobile communications systems; telecom/semiconductor industries.

Responsibilities

  • Flexibly apply skills and expertise to enable team delivery of success at a project level.
  • Collaborate with colleagues on the architecture, design, development, verification and documentation of our IP.
  • Develop RTL implementations of electronics systems for communication, using SystemVerilog.
  • Develop test benches for RTL implementations of electronics systems for communication, using SystemVerilog.

Skills

4+ years of experience in relevant fiel
SystemVerilog knowledge
C/C++/Matlab prototyping
Version control (Git)
Documentation (Confluence)
Time management (Jira)
AXI interfacing

Education

Degree qualified (or equivalent)

Tools

Mentor Graphics ModelSim
Altera Quartus
Xilinx Vivado
Synopsys DC
Cadence Genus

Job description

Design Engineers

Department: US Jobs

Employment Type: Permanent

Location: West Coast, United States

Compensation: $110,000 - $165,000 / year


Description

We are looking for multiple Design Engineers to work with us at AccelerComm. You will be working on cutting-edge technology projects and collaborating with an elite team to push the boundaries of wireless communications technology.

You will work on advanced development of IP, system, and board solutions, collaborating with industry-leading colleagues to push the capabilities of 5G technologies. This is your chance to work with a company that has international reach, in a hands-on role where you can use your skills and expertise to drive innovation forward.

We are specifically seeking Design Engineers with 4+ years of relevant industry experience to contribute to the development of our hardware solutions. Applicants will need to demonstrate a broad industry relevant skillset and be capable of advanced development of IP, system, and board solutions.

This is a hands-on role, which will play an important part in the growth of AccelerComm and in our product portfolio
AccelerComm will NOT sponsor H1 visa nor practical training.


Key Responsibilities
  • Flexibly apply skills and expertise to enable team delivery of success at a project level
  • Collaborate with colleagues on the architecture, design, development, verification and documentation of our IP
  • Develop RTL implementations of electronics systems for communication, using SystemVerilog
  • Develop test benches for RTL implementations of electronics systems for communication, using SystemVerilog

Skills, Knowledge and Expertise

Essential:

  • Degree qualified (or equivalent)
  • 4+ years of experience in relevant field in the industry
  • EDA tools for simulation and synthesis (Mentor Graphics ModelSim, Altera Quartus, Xilinx Vivado, Synopsys DC, Cadence Genus)
  • AXI interfacing
  • Timing and hardware resource optimisation for high throughput data or signal processing applications
  • C/C++/Matlab prototyping for design and verification
  • Version control and peer review (e.g. Git)
  • Documentation (e.g. Confluence)
  • Time management (e.g. Jira)

Desirable:

  • Experience of maintaining EDA tools (e.g. upgrades, license manager)
  • Experience of creating innovative solutions and documenting them (e.g. in publications or patents)
  • Automation (e.g. Jenkins)
  • Knowledge of communications signal processing algorithms (ideally error correction, equalisation, channel estimation, beamforming or another baseband component)
  • Appreciation of mobile communications systems
  • Understanding of telecoms and/or semiconductor industries

Personal Attributes

  • Must be highly innovative and self motivated
  • A team player, with an approach to version control and documentation that enables others
  • Presentable and with the commitment to build long term viable relationships with all stake-holders
  • Able to quickly gain customers’ trust
  • Commercially aware
  • Exceptional communication skills – written, presentational and verbal

Benefits

We offer a bonus scheme which pays up to 20% of salary annually, depending on performance. This is in addition to stock options and a range of good quality company benefits including 401K, health/dental/optical insurance. We operate flexible working hours and offer hybrid working.

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