DDR5/DDR6 Analog Engineering Lead

Renesas Electronics; Plano (TX); On-site; USD 130,000 - 160,000; Full time

Job summary

Renesas Electronics is seeking a Senior Analog Engineering Manager in Plano, Texas to lead the development of DDR5 and DDR6 PHY solutions for advanced SoCs. This role requires deep technical expertise in high-speed memory interfaces and strong program ownership.

The successful candidate will manage a high-performance team, ensuring delivery from architecture through to silicon bring-up while shaping the future technology roadmap.

Qualifications

• 12+ years of experience in analog/mixed-signal IC design with deep focus on high-speed memory interfaces.
• 5+ years of people-management and technical leadership experience.
• Proven hands-on delivery of DDR5 PHYs.

Responsibilities

• Lead the development of DDR5 and next-generation DDR6 PHY solutions.
• Manage a team responsible for end-to-end delivery of high-performance, low-power DDR PHYs.
• Drive the architecture, design, and implementation of DDR5 PHYs.

Skills

High-speed memory interfaces

People management

Technical leadership

Analog/mixed-signal design

Signal integrity

Education

Bachelor's or Master's degree in Electrical Engineering

Job description

Renesas Electronics is seeking a Senior Analog Engineering Manager in Plano, Texas to lead the development of DDR5 and DDR6 PHY solutions for advanced SoCs. This role requires deep technical expertise in high-speed memory interfaces and strong program ownership.

The successful candidate will manage a high-performance team, ensuring delivery from architecture through to silicon bring-up while shaping the future technology roadmap.