Custom Circuits Design Verification Engineer

Apple Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

An established industry player is seeking a Custom Circuits Design Verification Engineer to join their innovative team. In this pivotal role, you will ensure that all pre-silicon deliveries of custom IPs are bug-free, collaborating closely with design teams to achieve high-quality results. Your expertise in design verification processes, along with your knowledge of Verilog/System Verilog and digital simulation tools, will be critical in delivering exceptional products to market quickly. This is a fantastic opportunity to contribute to cutting-edge technology that enriches people's lives and be part of a diverse and inclusive workplace.

Qualifications

• 10+ years of relevant industry experience required.
• Strong DV skills including random verification and functional coverage.

Responsibilities

• Verify functionality and performance of custom IPs for Apple SoCs.
• Translate specifications into test benches and run regressions.

Skills

Design Verification

Random Verification Process

Functional Coverage

Code Coverage

Assertion Methodology

Verilog/System Verilog

Digital Simulation

Debug Tools

Scripting Language (Perl/Python)

RTL Coding

Education

BS degree

Tools

ESPCV

LEC

Regression Control Tools

Job description

Custom Circuits Design Verification Engineer

Does making the next great technology product excite you? At Apple, we work every single day to craft products that enrich peopleʼs lives. Our new ideas have a way of becoming great products, services, and customer experiences very quickly. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Appleʼs premier SoCs that make their way into Apple products. We are looking for a Design Verification Engineer who will enable bug-free first silicon for all the Digital custom IPs we deliver to the many SoCs that Apple produces.

Description

In this role as a Custom Circuits DV Engineer, you will be working with the digital custom circuits team to ensure that all pre-silicon deliveries of custom IPs to all Apple SoCs are bug-free. This requires you to review design and architecture specifications and understand the use cases and corner conditions. Furthermore, you will be required to translate these specifications into test benches that include all the respective components such as stimulus, checkers, assertions, trackers, and coverage. You will also work closely with both the custom circuit designers and RTL designers to understand the functionality and performance goals of the design. Additional responsibilities include running and triaging regressions, tracking bugs, and analyzing coverage to achieve high quality results. In this highly visible role, you will be at the center of a SoC design effort collaborating with all teams, with a critical impact on getting bug-free functional products to market quickly.

Minimum Qualifications

• BS degree plus minimum of 10 years of relevant industry experience.

Preferred Qualifications

• DV skills including, but not limited to, random verification process, functional coverage, code coverage, assertion methodology & philosophy.
• Knowledge of Verilog/System Verilog, digital simulation and debug tools.
• At least one scripting language, such as Perl or Python.
• Knowledge of behavioral and structural RTL coding especially as it pertains to SRAM, register file, and other custom circuit designs. Plus knowledge of FPGA and emulation challenges related to RTL coding and verification is desirable.
• Knowledge of industry standard design tools, such as ESPCV and/or LEC.
• Knowledge of regression and revision control tools.
• DFT (ATPG/MBIST) knowledge is desirable.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.